代码搜索：dataIn
找到约 2,888 项符合「dataIn」的源代码
代码结果 2,888
www.eeworm.com/read/337605/12357525
h cncparse.h
//
///Files:parse.h
//The parser interface for the CNC interperter
#ifndef _CNCPARSE_H_
#define _CNCPARSE_H_
//Function parse returns the newly
//constructed dataInterp
void parse(dataIn
www.eeworm.com/read/130423/14194829
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity top_encode is
port(
clk : in vl_logic;
rst : in vl_logic;
datain : in vl_logi
www.eeworm.com/read/14022/292032
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/17761/756364
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/17761/756669
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/17761/757038
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/17761/757423
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/18434/788406
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/18434/788967
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity hssi_tx is
generic(
channel_width : integer := 1
);
port(
clk : in vl_logic;
datain : i
www.eeworm.com/read/467464/1501634
v sdram_controller.v
module Sdram_Controller(
// HOST
REF_CLK,
RESET_N,
ADDR,
WR,
RD,
LENGTH,
ACT,
DONE,
DATAIN,
DATAOUT,
IN_REQ,
OUT_VALID,
DM