代码搜索：adder
找到约 6,792 项符合「adder」的源代码
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www.eeworm.com/read/465744/7044951
pof adder.pof
www.eeworm.com/read/465744/7044955
pin adder.pin
-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and a
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sof adder.sof
www.eeworm.com/read/465372/7053965
doc adder.doc
www.eeworm.com/read/400482/7103310
v adder.v
module adder(cout,sum,a,b,cin);
parameter size=16;
output cout;
output[size-1:0] sum;
input cin;
input[size-1:0] a,b;
assign {cout,sum}=a+b+cin;
endmodule
www.eeworm.com/read/133357/7125799
v adder.v
// megafunction wizard: %LPM_ADD_SUB%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: lpm_add_sub
// ============================================================
// File Name: adder.v
//
www.eeworm.com/read/462058/7209739
v adder.v
//Top level module
module adder(S, C4, A, B, C0);
input [3:0] A, B;
input C0;
output [3:0] S;
output C4;
wire C1, C2, C3; //Intermediate carries
//Instantiate the fulladder
fulladder FA0(
www.eeworm.com/read/461262/7230932
xco adder.xco
##############################################################
#
# Xilinx Core Generator version i+IP+122117
# Date: Sun Sep 09 14:00:29 2007
#
########################################################
www.eeworm.com/read/457446/7325437
vhd adder.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity adder is
Generic ( size : integer := 8);
Port ( a : in std_logic_vector(size-