代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/159552/10640533
v adder8.v
module adder8(cout,sum,ina,inb,cin,clk);
output[7:0] sum;
output cout;
input[7:0] ina,inb;
input cin,clk;
reg[7:0] tempa,tempb,sum;
reg cout;
reg tempc;
always @(posedge clk)
begin
tempa=i
www.eeworm.com/read/159552/10640597
acf adder4.acf
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
www.eeworm.com/read/159552/10640607
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/159552/10640618
ndb adder4.ndb
NDB006
The number of symbol table entries is: 1
The length of the symbol table is: 2
Index Hierarchy Path
----- --------------
! |
The number of name info structs is : 1
InsOrder BitField
www.eeworm.com/read/159552/10640621
v adder_tp.v
`timescale 1ns/1ns
`include "adder4.v"
module adder_tp;
reg[3:0] a,b;
reg cin;
wire[3:0] sum;
wire cout;
integer i,j;
adder4 adder(sum,cout,a,b,cin);
always #5 cin=~cin;
initial
begin
www.eeworm.com/read/159552/10640624
hif adder4.hif
HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
www.eeworm.com/read/159044/10699313
txt sequential__adder.txt
module sequential__adder(a, b, sum, clock);
parameter width = 1;
input [width-1:0] a;
input [width-1:0] b;
input clock;
output [width-1:0] sum;
reg [width-1:0] sum;
always @(posedge clk
www.eeworm.com/read/349103/10851898
scr adder16.scr
/* Script file for constraining Adder16 */
rpt_file = "adder16.rpt"
design = "adder16"
current_design Adder16
include script_path + defaults.con
/* Define design environment */
set_load 2.2 sout
set
www.eeworm.com/read/349103/10851943
v adder8.v
module Adder8 (ain, bin, cin, sout, cout, clk);
/* Eight Bit Adder Module */
output [7:0] sout;
output cout;
input [7:0] ain, bin;
input cin, clk;
wire [7:0] sout_tmp, ain, bin;
wire cout_tmp;
reg [7
www.eeworm.com/read/349103/10851955
v adder16.v
module Adder16 (ain, bin, cin, sout, cout, clk);
/* Sixteen Bit Adder Module */
output [15:0] sout;
output cout;
input [15:0] ain, bin;
input cin, clk;
wire [15:0] sout_tmp, ain, bin;
wire cout_tmp;