代码搜索:adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/446443/7578564
rpt adder8.rpt
Project Information f:\study\eda\8weiquanjiaqi\adder8.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 04/02/2009 20:23:27
Copyright (C) 1988-2002 Al
www.eeworm.com/read/213274/15138372
rpt b8_adder.fit.rpt
Fitter report for b8_adder
Thu Oct 12 16:22:23 2006
Version 5.0 Build 148 04/26/2005 SJ Full Version
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; Table of Contents ;
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1. Legal Notice
2.
www.eeworm.com/read/213274/15138380
rpt b8_adder.map.rpt
Analysis & Synthesis report for b8_adder
Thu Oct 12 16:22:17 2006
Version 5.0 Build 148 04/26/2005 SJ Full Version
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; Table of Contents ;
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1. Lega
www.eeworm.com/read/214503/15098139
fdo adder4_adder4t_v_tf.fdo
## NOTE: Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Tue Dec 27 16:52:21 中国标准时间 2005
##
vlib work
vlog adder4.v
vlog adder4t.v
vlog "D:/Xilinx/verilog/src/glbl.v"
v
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udo adder4_adder4t_v_tf.udo
-- ProjNav VHDL simulation template: adder4_adder4t_v_tf.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation co
www.eeworm.com/read/389577/8513511
v adder4.v
module adder4(a,b,cin,sum,cout);
output [3:0] sum;
output cout;
input [3:0] a,b;
input cin;
assign {cout,sum}=a+b+cin;
endmodule
www.eeworm.com/read/433021/8551521
ucf adder_cs.ucf
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "a" LOC = "p45" ;
NET "a" LOC = "p31" ;
NET "a" LOC = "p30" ;
NET "a" LOC = "p29
www.eeworm.com/read/433021/8551522
ntrc_log adder.ntrc_log
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Xst NTRC: "/adder" : OUT_OF_DATE
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Xst NTRC: "/adder" : OUT_OF_DATE
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