代码搜索：adder
找到约 6,792 项符合「adder」的源代码
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www.eeworm.com/read/126327/14428587
vhd adder.vhd
-- MAX+plus II VHDL Example
-- Conversion Function
-- Copyright (c) 1994 Altera Corporation
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
ENTITY adder IS
PORT (o
www.eeworm.com/read/227218/14436913
sim adder.sim
www.eeworm.com/read/227218/14436918
syn adder.syn
www.eeworm.com/read/226702/14454367
vhd adder.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity adder is
port(a,b : in std_logic_vector(9 downto 0);
clk: in std_logic;
s : out std_logic_
www.eeworm.com/read/226702/14454770
bsf adder.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/125697/14470288
vhd adder.vhd
------------------------------------------------------------------------
-- Single-bit adder
------------------------------------------------------------------------
library IEEE;
use IEEE.std_log
www.eeworm.com/read/221576/14737126
si adder.si
Name Adder;
Partno CA0016;
Date 10/08/85;
Rev 01;
Designer Woolhiser;
Company Assisted Technology;
Assembly None;
Location None;
Device G16V8;
/******************
www.eeworm.com/read/221576/14737153
pld adder.pld
Name Adder;
Partno CA0016;
Date 10/08/85;
Rev 01;
Designer Woolhiser;
Company Assisted Technology;
Assembly None;
Location None;
Device G16V8;
/******************
www.eeworm.com/read/220617/14795069
v adder.v
module adder(cout,sum,a,b,cin);
parameter size=16;
output cout;
output[size-1:0] sum;
input cin;
input[size-1:0] a,b;
assign {cout,sum}=a+b+cin;
endmodule
www.eeworm.com/read/117081/14940497
java adder.java
/**
* Title:
* Description:
* Copyright: Copyright (c) 2003
* Company:
* @author not attributable
* @version 1.0
*/
public class Adder extends Threa