代码搜索：Verilog
找到约 10,000 项符合「Verilog」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585980
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_or7 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5585986
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and8 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586005
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and5 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586009
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and4 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586011
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and6 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586012
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_or2 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic
www.eeworm.com/read/159314/5586022
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_or8 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586041
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and7 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586050
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_and3 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;
www.eeworm.com/read/159314/5586053
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity x_or3 is
port(
o : out vl_logic;
i0 : in vl_logic;
i1 : in vl_logic;