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hdpdeps.ref
V1 10
FL D:/BJ_xilinx/demo_led/Memec_3SLC_VHDL_ISE63/seven_seg.vhd 2005/08/29.11:42:32
EN work/SEVEN_SEG FL D:/BJ_xilinx/demo_led/Memec_3SLC_VHDL_ISE63/seven_seg.vhd \
PB ieee/STD_LOGIC
clock.qsf
# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
itemnew3_2.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
step_motor.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
frequency.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
biyesheji.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
shfrt.qsf
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
ppc405_0_wrapper_xst.prj
VHDL ppc405_v2_00_c g:\EDK\hw\XilinxProcessorIPLib\pcores\ppc405_v2_00_c/hdl/vhdl/ppc405_top.vhd
vhdl work ../hdl/ppc405_0_wrapper.vhd
ppc405_0_wrapper_xst.prj
VHDL ppc405_v2_00_c g:\EDK\hw\XilinxProcessorIPLib\pcores\ppc405_v2_00_c/hdl/vhdl/ppc405_top.vhd
vhdl work ../hdl/ppc405_0_wrapper.vhd
pictest.vhd
--*** SYNTHETIC PIC V1.1 ***
--
-- VHDL
--
-- Entity: PICTEST
-- Purpose: This is a simple VHDL behavioral wrapper for testing the Synthetic PIC.
-- All this entity does is instantiate