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# Copyright (C) 1991-2006 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Qua

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

V3 32 FL D:/work/vhdl/PBLCD/LCD.VHD 2007/03/18.00:56:53 I.24 EN work/lcd 1174189186 FL D:/work/vhdl/PBLCD/LCD.VHD PB ieee/std_logic_1164 1131108373 \ PB ieee/std_logic_arith 11311

can_top.vhdsim_xlate -- generated only for ProjNav status tracking Simulation Model Target: Generic_VHDL

#add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib work "../vhdl/addsub_cy_.vhd" add_file -vhdl -lib work "../vhdl/addsub_cy_rtl.vhd" add_file -vhdl -lib work ".

#ifndef TYPEDEFS_H #define TYPEDEFS_H typedef class vhdl_const *pConst; typedef class type_range * pTypeRange; typedef class type *pType; typedef class sym *pSym; typedef class node NODE; #end

# Copyright (C) 1991-2006 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu