alu.map.qmsg

来自「实现4位加减乘除的alu」· QMSG 代码 · 共 15 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Dec 24 23:25:00 2005 " "Info: Processing started: Sat Dec 24 23:25:00 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off alu -c alu " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off alu -c alu" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "booth_mul.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file booth_mul.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 booth_mul-Behavior " "Info: Found design unit 1: booth_mul-Behavior" {  } { { "e:/10_vhdl/alu/alu/booth_mul.vhd" "booth_mul-Behavior" "" { Text "e:/10_vhdl/alu/alu/booth_mul.vhd" 15 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 booth_mul " "Info: Found entity 1: booth_mul" {  } { { "e:/10_vhdl/alu/alu/booth_mul.vhd" "booth_mul" "" { Text "e:/10_vhdl/alu/alu/booth_mul.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fast_div.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fast_div.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fast_div-Behavior " "Info: Found design unit 1: fast_div-Behavior" {  } { { "e:/10_vhdl/alu/alu/fast_div.vhd" "fast_div-Behavior" "" { Text "e:/10_vhdl/alu/alu/fast_div.vhd" 16 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 fast_div " "Info: Found entity 1: fast_div" {  } { { "e:/10_vhdl/alu/alu/fast_div.vhd" "fast_div" "" { Text "e:/10_vhdl/alu/alu/fast_div.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fast_add.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fast_add.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fast_add-Behavior " "Info: Found design unit 1: fast_add-Behavior" {  } { { "e:/10_vhdl/alu/alu/fast_add.vhd" "fast_add-Behavior" "" { Text "e:/10_vhdl/alu/alu/fast_add.vhd" 17 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 fast_add " "Info: Found entity 1: fast_add" {  } { { "e:/10_vhdl/alu/alu/fast_add.vhd" "fast_add" "" { Text "e:/10_vhdl/alu/alu/fast_add.vhd" 8 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "alu.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file alu.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 alu-Behavior " "Info: Found design unit 1: alu-Behavior" {  } { { "e:/10_vhdl/alu/alu/alu.vhd" "alu-Behavior" "" { Text "e:/10_vhdl/alu/alu/alu.vhd" 17 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 alu " "Info: Found entity 1: alu" {  } { { "e:/10_vhdl/alu/alu/alu.vhd" "alu" "" { Text "e:/10_vhdl/alu/alu/alu.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fast_Sub.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fast_Sub.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fast_sub-Behavior " "Info: Found design unit 1: fast_sub-Behavior" {  } { { "e:/10_vhdl/alu/alu/fast_Sub.vhd" "fast_sub-Behavior" "" { Text "e:/10_vhdl/alu/alu/fast_Sub.vhd" 12 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 fast_sub " "Info: Found entity 1: fast_sub" {  } { { "e:/10_vhdl/alu/alu/fast_Sub.vhd" "fast_sub" "" { Text "e:/10_vhdl/alu/alu/fast_Sub.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/tools/altera/quartus41/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/tools/altera/quartus41/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "d:/tools/altera/quartus41/libraries/megafunctions/lpm_add_sub.tdf" "lpm_add_sub" "" { Text "d:/tools/altera/quartus41/libraries/megafunctions/lpm_add_sub.tdf" 106 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/tools/altera/quartus41/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/tools/altera/quartus41/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "d:/tools/altera/quartus41/libraries/megafunctions/addcore.tdf" "addcore" "" { Text "d:/tools/altera/quartus41/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/tools/altera/quartus41/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/tools/altera/quartus41/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "d:/tools/altera/quartus41/libraries/megafunctions/a_csnbuffer.tdf" "a_csnbuffer" "" { Text "d:/tools/altera/quartus41/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/tools/altera/quartus41/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/tools/altera/quartus41/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "d:/tools/altera/quartus41/libraries/megafunctions/altshift.tdf" "altshift" "" { Text "d:/tools/altera/quartus41/libraries/megafunctions/altshift.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "145 " "Info: Implemented 145 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "13 " "Info: Implemented 13 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "10 " "Info: Implemented 10 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "122 " "Info: Implemented 122 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Dec 24 23:25:03 2005 " "Info: Processing ended: Sat Dec 24 23:25:03 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}