代码搜索：VHDL

找到约 10,000 项符合「VHDL」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/493986/6386136

vhdsim_par project.vhdsim_par

project.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Generic_VHDL
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www.eeworm.com/read/487358/6509323

stx top.stx

Release 9.2i - xst J.36 Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to ./xst/projnav.tmp CPU : 0.00 / 0.14 s | Elapsed : 0.00 / 1.00 s --> ==================
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www.eeworm.com/read/486944/6521342

log coregen.log

# Xilinx CORE Generator 6.1i # User = 刘韬 Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\刘韬\MY_WORK\FPGA\程序\I2C\coregen.log # busformat=BusFormatAn
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www.eeworm.com/read/481905/6632393

log coregen.log

# Xilinx CORE Generator 6.1i # User = ferluga Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\JernejAles\Termometro_visualizzato_su_VGA\VGAterm\core
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www.eeworm.com/read/477743/6733661

cfg compxlib.cfg

#***************************************************************** # compxlib initialization file (compxlib.cfg) * #
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www.eeworm.com/read/477386/6733980

txt 时序仿真.txt

查看Quartus 6.0的帮助文件，试验了一下可以进行时序仿真，以前看到过一些相关文章，但都没有成功，关键的一个问题就是没有编译库文件，总结步骤如下(本人用Verilog，括号中给出了用<mark>VHDL</mark>时的相关提示： ［注］Quartus版本为 6.0，ModelSim为 6.2a，其它版本可能稍有不同 方法一、根据Quartus帮助文件改写 1、File > Change Directo ...
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www.eeworm.com/read/477557/6738387

prj microoven_bencher.prj

vhdl work "PICunit.vhd" vhdl work "key_number_encoder.vhd" vhdl work "counter.vhd" vhdl work "clkdiv2.vhd" vhdl work "clkdiv3.vhd" vhdl work "seven_segnment.vhd" vhdl work "microoven.vhd"
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www.eeworm.com/read/477557/6738589

prj microoven_tbw_bencher.prj

vhdl work "PICunit.vhd" vhdl work "key_number_encoder.vhd" vhdl work "counter.vhd" vhdl work "clkdiv2.vhd" vhdl work "clkdiv3.vhd" vhdl work "seven_segnment.vhd" vhdl work "microoven.vhd"
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www.eeworm.com/read/477557/6738618

prj microoven.prj

vhdl work "PICunit.vhd" vhdl work "key_number_encoder.vhd" vhdl work "counter.vhd" vhdl work "clkdiv2.vhd" vhdl work "clkdiv3.vhd" vhdl work "seven_segnment.vhd" vhdl work "microoven.vhd"
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www.eeworm.com/read/407665/11412331

prj leon.prj

#device options set_option -technology Virtex set_option -part XCV300 set_option -package PQ240 set_option -speed_grade -4 #add_file options add_file -vhdl -lib work "../leon/amba.vhd" add_file -vhd
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