代码搜索:VHDL

找到约 10,000 项符合「VHDL」的源代码

代码结果 10,000
www.eeworm.com/read/137849/13293807

txt hdl编码风格与编码指南.txt

HDL编码风格与编码指南 HDL编码风格与编码指南 作者:徐欣 博士 孙广富 博士 原文出自e元素科技网站 Rev. 0.1 June 30,2002 第一部分:说明 1.准则的重要程度分三个层次: 好的经验 -- 表明这条规则是一般情况下比较好的经验,在大多数的情况下 要遵循,在特殊情况下可以突破这一规则 ...
www.eeworm.com/read/239116/13302442

qsf compact_flash_ide_hard_disk_interface.qsf

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any
www.eeworm.com/read/323126/13349711

qsf sin.qsf

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any
www.eeworm.com/read/136945/13352784

dat bookinfo.dat

[General Information] 书名=可编程逻辑系统的VHDL设计技术 作者= 页数=383 SS号=0 出版日期=
www.eeworm.com/read/315411/13544385

qsf sdh_top.qsf

# Copyright (C) 1991-2007 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu
www.eeworm.com/read/314805/13558786

ref hdllib.ref

EN clock NULL C:/Xilinx/bin/MyCPU16/clock.vhdl sub00/vhpl04 EN visit_memory NULL C:/Xilinx/bin/MyCPU16/visit_memory.vhdl sub00/vhpl10 AR alu behavioral C:/Xilinx/bin/MyCPU16/ALU.vhdl sub00/vhpl03 E
www.eeworm.com/read/314060/13575908

cmd_log cnt60.cmd_log

sch2vhdl -family=virtex2 -flat -suppress -w CNT60.sch cnt60.vhf
www.eeworm.com/read/312754/13605417

txt readme.txt

注1: 含有不可综合语句,请自行修改 注2: 一些PLD只允许I/O口对外三态,不支持内部三态,使用时要注意 注3: 设计RAM的最好方法是利用器件厂家提供的软件自动生成RAM元件,并在VHDL程序中例化
www.eeworm.com/read/311483/13630139

qsf lock.qsf

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu
www.eeworm.com/read/305986/13755588

txt readme.txt

注1: 含有不可综合语句,请自行修改 注2: 一些PLD只允许I/O口对外三态,不支持内部三态,使用时要注意 注3: 设计RAM的最好方法是利用器件厂家提供的软件自动生成RAM元件,并在VHDL程序中例化