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rpt serial.asm.rpt

Assembler report for serial Thu Feb 07 21:58:18 2008 Version 5.0 Build 148 04/26/2005 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2
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mpf risc.mpf

[Library] ; Altera specific primitive library mappings vital2000 = $MODEL_TECH/../vital2000 ieee = $MODEL_TECH/../ieee verilog = $MODEL_TECH/../verilog std = $MODEL_TECH/../std std_develope
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srs dds.srs

@E @ # # # # Created by Synplify VHDL Compiler version 1.0, Build 158R from Synplicity, Inc. # Copyright 1994-2007 Synplicity, Inc. , All rights reserved. # Synthesis Netlist written on Sat Ju
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qmsg prev_cmp_sm.map.qmsg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
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qsf shuzi.qsf

# Copyright (C) 1991-2007 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu
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cmd_log detector.cmd_log

sch2vhdl -family spartan2 -flat -suppress -w detector.sch detector.vhf sch2vhdl -family spartan2 -flat -suppress -w detector.sch detector.vhf sch2vhdl -family spartan2 -flat -suppress -w detector.sc
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gfl lab3.gfl

# Schematic : PDCL (jhdparse) __projnav/detector_jhdparse_tcl.rsp # Bencher Waveform : PDCL (jhdparse) # Schematic : View VHDL Functional Model detector.vhf detector.cmd_log # Schematic : PDCL (
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qsf dds.qsf

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any
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nlf crc_timesim.nlf

Release 7.1i - netgen H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: netgen -intstyle ise -s 4 -pcf crc.pcf -rpw 100 -tpw 0 -ar Structure -xon true -w -ofmt vhdl -sim
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par_nlf crc.par_nlf

Release 7.1i - netgen H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: netgen -intstyle ise -s 4 -pcf crc.pcf -rpw 100 -tpw 0 -ar Structure -xon true -w -ofmt vhdl -sim
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