代码搜索：VHDL
找到约 10,000 项符合「VHDL」的源代码
代码结果 10,000
www.eeworm.com/read/487358/6509234
udo aaa.udo
-- ProjNav VHDL simulation template: aaa.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation commands
www.eeworm.com/read/486385/6540717
prj mc8051_control.prj
vhdl work "mc8051_p.vhd"
vhdl work "control_fsm.vhd"
vhdl work "control_mem.vhd"
vhdl work "mc8051_control.vhd"
www.eeworm.com/read/481836/6631539
log coregen.log
# Xilinx CORE Generator 6.1i
# User = Administrator
Initializing default project...
Loading plug-ins...
All runtime messages will be recorded in E:\Create-SOPC1000X\ISE\Exp4-Clock\coregen.log
# b
www.eeworm.com/read/482036/6635387
udo test.udo
-- ProjNav VHDL simulation template: test.udo
-- You may edit this file after the line that starts with
-- '-- START' to customize your simulation
-- START user-defined simulation commands
www.eeworm.com/read/480296/6672047
npl irda.npl
JDF E
// Created by ISE ver 1.0
PROJECT IrDA
DESIGN irda Normal
DEVKIT XCR3128XL TQ144
DEVFAM xpla3
FLOW XST VHDL
STIMULUS uart_tb.vhd Normal
STIMULUS irda_uart_tb.vhd Normal
MODULE txmit.vhd
www.eeworm.com/read/477743/6733650
makefile
LIBS = -Pcommon
build:
ghdl -m $(LIBS) $(TARGET)
scan: common/scan work/scan
%/scan:
ghdl -i --work=$* --workdir=$* $(LIBS) $*/*.vhdl
work/scan:
ghdl -i --mb-comments $(LIBS) *.vhdl
%/clean:
www.eeworm.com/read/263246/11370137
_info
m255
K3
13
cModel Technology
dC:\Dokumente und Einstellungen\yi.luo\Desktop\VHDL\counter\sim
Ebcd_2_7seg
Z0 w1195056317
Z1 DP ieee numeric_std =NSdli^?T5OD8;4F
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mti watch.cr.mti
{C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/stop_watch.vhd} {1 {vcom -work work -2002 -explicit {C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise
www.eeworm.com/read/262821/11389070
fld dds_sin.fld
D:/VHDL/dds_sin_std1/db/dds_sin.quartus_db
dds_sin