_info

vhdl语言编写的一个秒表源码

m255
K3
13
cModel Technology
dC:\Dokumente und Einstellungen\yi.luo\Desktop\VHDL\counter\sim
Ebcd_2_7seg
Z0 w1195056317
Z1 DP ieee numeric_std =NSdli^?T5OD8;4F<blj<3
Z2 DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
Z3 dC:\Dokumente und Einstellungen\yi.luo\Desktop\VHDL\watch\sim
Z4 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/bcd_2_7seg.vhd
Z5 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/bcd_2_7seg.vhd
l0
L17
V2gh:2g5NPDDR95z@<JPA@2
Z6 OP;C;6.3c;37
32
Z7 o-work work -2002 -explicit -O0
Z8 tExplicit 1
Abehavioral_bcd_2_7seg
R1
R2
DE work bcd_2_7seg 2gh:2g5NPDDR95z@<JPA@2
l26
L25
VKkjo818NYQF_;5F>b0a]o2
R6
32
Z9 M2 ieee std_logic_1164
Z10 M1 ieee numeric_std
R7
R8
Ccfg_tb
abehavioral_tb_stop_watch
etb_stop_watch
Z11 DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
Z12 DE work stop_watch_reference 8cGzGC90c_OM>B^gdLl;f2
Z13 DE work stop_watch PM9NCn?]m:3XHi2Yg>YG00
DA work tb_stop_watch behavioral_tb_stop_watch bKQiH<aFAjH4mC]CUmdOm2
Z14 DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
R1
R2
Z15 DP std textio K]Z^fghZ6B=BjnK5NomDT3
Z16 DE work tb_stop_watch `RFd7J[_IXk299^@fm37L0
Z17 w1195133090
R3
Z18 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/tb/tb_stop_watch.vhd
Z19 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/tb/tb_stop_watch.vhd
l0
L291
V^R2hHCgTK=B9Zez6MO@RQ3
R6
32
M5 std textio
M4 ieee std_logic_1164
M3 ieee numeric_std
M2 ieee std_logic_textio
Z20 M1 ieee std_logic_arith
R7
R8
Econtrol
Z21 w1195229262
R1
R2
R3
Z22 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/control.vhd
Z23 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/control.vhd
l0
L6
V6?`ZEOa?FTaOo:Q39aNOQ1
R6
32
R7
R8
Abehavioral_control
R1
R2
DE work control 6?`ZEOa?FTaOo:Q39aNOQ1
l23
L19
VdLFBl4za:Z8bKj^FLLF>O2
R6
32
R9
R10
R7
R8
Edisp_out
Z24 w1195056302
R1
R2
R3
Z25 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/disp_out.vhd
Z26 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/disp_out.vhd
l0
L6
VL=Sl@1];YMLFAIj;P^`a@2
R6
32
R7
R8
Abehavioral_disp_out
R1
R2
DE work disp_out L=Sl@1];YMLFAIj;P^`a@2
l49
L22
VFcgDhPOY<A=GaE1mFXGL<1
R6
32
R9
R10
R7
R8
Edual2bcd
Z27 w1195056453
R1
R2
R3
Z28 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/dual2bcd.vhd
Z29 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/dual2bcd.vhd
l0
L35
VRU]n?2U:`[:8=lAdMzbF43
R6
32
R7
R8
Abehavioral_dual2bcd
R1
R2
DE work dual2bcd RU]n?2U:`[:8=lAdMzbF43
l67
L53
VdIh@Z5EnE_@WO1WhFEb]K1
R6
32
R9
R10
R7
R8
Egen_10ms
Z30 w1195056501
R1
R2
R3
Z31 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/gen_10ms.vhd
Z32 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/gen_10ms.vhd
l0
L6
V^3lZg]:3_aRS[6Q7oRZ=?0
R6
32
R7
R8
Abehavioral_gen_10ms
R1
R2
DE work gen_10ms ^3lZg]:3_aRS[6Q7oRZ=?0
l19
L14
VY5KTHR<oS`^f7=aToIH8U1
R6
32
R9
R10
R7
R8
Epulse_shape
Z33 w1195056311
R1
R2
R3
Z34 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/pulse_shape.vhd
Z35 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/pulse_shape.vhd
l0
L6
VeFObMOPUOmW4co91N=Hb]3
R6
32
R7
R8
Abehavioral_pulse_shape
R1
R2
DE work pulse_shape eFObMOPUOmW4co91N=Hb]3
l18
L16
Vc;:IWmb<4M1X95[2cMhHA2
R6
32
R9
R10
R7
R8
Estop_watch
Z36 w1195056313
R1
R2
R3
Z37 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/stop_watch.vhd
Z38 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/stop_watch.vhd
l0
L6
VPM9NCn?]m:3XHi2Yg>YG00
R6
32
R7
R8
Astruct_stop_watch
R1
R2
R13
l78
L20
VC950QUVj7bZP5YmE`j:c?3
R6
32
R9
R10
R7
R8
Estop_watch_reference
Z39 w1145617263
R11
R2
R3
Z40 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/tb/stop_watch_reference.vhd
Z41 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/tb/stop_watch_reference.vhd
l0
L6
V8cGzGC90c_OM>B^gdLl;f2
R6
32
R7
R8
Areference_stop_watch
R11
R2
R12
l53
L20
Vdb1MGSH?RaL=Im97BL@OF1
R6
32
R9
R20
R7
R8
Etb_stop_watch
R17
R14
R1
R2
R15
R3
R18
R19
l0
L8
V`RFd7J[_IXk299^@fm37L0
R6
32
R7
R8
Abehavioral_tb_stop_watch
R14
R1
R2
R15
R16
l100
L12
VbKQiH<aFAjH4mC]CUmdOm2
R6
32
M4 std textio
Z42 M3 ieee std_logic_1164
M2 ieee numeric_std
M1 ieee std_logic_textio
R7
R8
Etime
R21
R1
R2
R3
Z43 8C:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/time.vhd
Z44 FC:/Dokumente und Einstellungen/yi.luo/Desktop/VHDL/watch/src_exercise/design/time.vhd
l0
L5
VTYDm9gU:b36I9jd`7nIV90
R6
32
R7
R8
Abehavioral_time
R1
R2
DE work time TYDm9gU:b36I9jd`7nIV90
l21
L15
VN4f?_AUH[jLLamAN8G@[a2
R6
32
R9
R10
R7
R8