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vhdl.lst
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vhdl.vhd
-- generated by newgenasym Thu Apr 30 11:30:12 2009
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity \74ls256\ is
port (
A: IN STD_LOGIC_VECTOR (8 DOWNTO 0
litenandfsm.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
nandeccctrl.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
hammingerrloc.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
100vhdl+
-- Author : yzf
-- Created On: Fri Dec 8 09:35:16 1995
-- Testbench for gcd_disp.gcd_disp
--Notice:
--This file has been modified by Wu Qing-ping on Apr 23, 1998.
--Modification: I change a
100vhdl+
-- Author : yzf
-- Created On: Fri Dec 8 09:35:16 1995
-- Testbench for gcd_disp.gcd_disp
library STD;
library WORK;
use STD.STANDARD.ALL;
use WORK.ALL;
entity test_gcd_disp is
end t