代码搜索：UART
找到约 10,000 项符合「UART」的源代码
代码结果 10,000
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ut uart.ut
-w
-g DebugBitstream:No
-g Binary:no
-g Gclkdel0:11111
-g Gclkdel1:11111
-g Gclkdel2:11111
-g Gclkdel3:11111
-g ConfigRate:4
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:Pu
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syr uart.syr
Release 7.1.04i - xst H.42
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to __projnav
CPU : 0.00 / 1.14 s | Elapsed : 0.00 / 1.00 s
--> Parameter xsthdpdir set
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vhd uart.vhd
--
-- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在
--PC机上安装一个串口调试工具来验证程序的功能。
-- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控
--制器，10个bit是1位起始位，8个数据位，1个结束
--位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实
--现相应的波特率。程序当前设定的div_par 的值 ...
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lfp uart.lfp
# begin LFP file E:\temp\95144\vhdl\uart\uart.lfp
designfile UART.vhd
parttype xc95144xl-tq144-10
bus_delimiter 0;
set_busdelim_onsave 0;
IO_GROUP "seg_data" ;
NET "seg_data" IO_GROUP="seg_d
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pad uart.pad
Release 7.1i - par H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
Tue Mar 14 15:08:55 2006
# NOTE: This file is designed to be imported into a spreadsheet program
# such as Microso
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bld uart.bld
Release 7.1i ngdbuild H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
Command Line: ngdbuild -intstyle ise -dd
e:\temp\spartan2\vhdl\interface\uart/_ngo -uc uart.ucf -p xc2s50-tq144-
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mrp uart.mrp
Release 7.1i Map H.38
Xilinx Mapping Report File for Design 'uart'
Design Information
------------------
Command Line : D:/Xilinx/bin/nt/map.exe -ise
e:\temp\spartan2\vhdl\interface\uart\uart.ise
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rpt uart.rpt
cpldfit: version H.42 Xilinx Inc.
Fitter Report
Design Name: uart Date: 2-21-2006, 11:28AM
Device