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Release 7.1.01i - par H.39 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Fri Mar 25 09:04:04 2005 # NOTE: This file is designed to be imported into a spreadsheet program # such as Micr

Release 7.1.01i ngdbuild H.39 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -intstyle ise -dd e:\demo_fpga/_ngo -nt timestamp -uc fdfghgf.ucf -p xc2s100e-pq208-6

Release 7.1.01i Map H.39 Xilinx Mapping Report File for Design 'uart' Design Information ------------------ Command Line : E:/Program/EDA/Xilinx/bin/nt/map.exe -ise e:\demo_fpga\DEMO_FPGA.ise -int

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn uart.prj -ifmt mixed -ofn uart -ofmt NGC -p xc2s100e-6-pq208 -top uart -opt_mode Speed -opt_level 1 -iuc NO -lso uart.lso -keep_hierarc

//! ************************************************************************** // Written by: Map H.39 on Fri Mar 25 09:03:51 2005 //! ***************************************************************

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