uart.mrp

总体演示程序DEMO_FPGA.rar

Release 7.1.01i Map H.39
Xilinx Mapping Report File for Design 'uart'

Design Information
------------------
Command Line   : E:/Program/EDA/Xilinx/bin/nt/map.exe -ise
e:\demo_fpga\DEMO_FPGA.ise -intstyle ise -p xc2s100e-pq208-6 -cm area -pr b -k 4
-c 100 -tx off -o uart_map.ncd uart.ngd uart.pcf 
Target Device  : xc2s100e
Target Package : pq208
Target Speed   : -6
Mapper Version : spartan2e -- $Revision: 1.26.6.4 $
Mapped Date    : Fri Mar 25 09:25:15 2005

Design Summary
--------------
Number of errors   :   6
Number of warnings :   0

Section 1 - Errors
------------------
ERROR:MapLib:30 - LOC constraint p37 on dout<0> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint 112 on en<4> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint 114 on en<3> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint 116 on en<2> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint 118 on en<1> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.
ERROR:MapLib:30 - LOC constraint 120 on en<0> is invalid: No such site on the
   device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'.

Section 2 - Warnings
--------------------

Section 3 - Informational
-------------------------
INFO:MapLib:562 - No environment variables are currently set.

Section 4 - Removed Logic Summary
---------------------------------

Section 5 - Removed Logic
-------------------------