代码搜索:U盘设计
找到约 10,000 项符合「U盘设计」的源代码
代码结果 10,000
www.eeworm.com/read/453355/7422078
pcbdoc u盘电路设计.pcbdoc
www.eeworm.com/read/453355/7422080
schdoc u盘电路设计.schdoc
www.eeworm.com/read/453355/7422083
drc u盘电路设计.drc
Protel Design System Design Rule Check
PCB File : \Program Files\Altium2004\Examples\U盘电路设计\U盘电路设计.PcbDoc
Date : 2008-9-22
Time : 17:48:52
Processing Rule : Width Constraint (Min=0.2mm)
www.eeworm.com/read/453355/7422085
prjpcb u盘电路设计.prjpcb
[Design]
Version=1.0
HierarchyMode=0
ChannelRoomNamingStyle=0
OutputPath=
ChannelDesignatorFormatString=$Component_$RoomName
ChannelRoomLevelSeperator=_
OpenOutputs=1
ArchiveProject=0
Timesta
www.eeworm.com/read/453355/7422088
schlib u盘电路设计.schlib
www.eeworm.com/read/453355/7422141
prjpcbstructure u盘电路设计.prjpcbstructure
Record=TopLevelDocument|FileName=U盘电路设计.SCHDOC
www.eeworm.com/read/453355/7422144
net u盘电路设计.net
[
C1
CAPR5-4X5
Cap2
]
[
C2
RAD-0.3
Cap
]
[
C3
RAD-0.3
Cap
]
[
C4
RAD-0.3
Cap
]
[
C5
RAD-0.3
Cap
]
[
C6
RAD-0.3
Cap
]
[
C7
RAD-0.3
C
www.eeworm.com/read/217265/14972218
schdoc u盘电路设计.schdoc
www.eeworm.com/read/217265/14972228
pcbdoc u盘电路设计.pcbdoc
www.eeworm.com/read/217265/14972230
drc u盘电路设计.drc
Protel Design System Design Rule Check
PCB File : \Protel DXP 2004\Design\chapter13\U盘电路设计.PCBDOC
Date : 2005-5-22
Time : 16:21:22
Processing Rule : Width Constraint (Min=0.2mm) (Max=0.3