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State Machine 的代码
fpga313czkz.smp_dump.txt
State Machine - |fpga313czkz|parallel_port:m4|mach_rd_next
Name mach_rd_next.RD_IDLE mach_rd_next.RD_END mach_rd_next.RD_START
mach_rd_next.RD_IDLE 0 0 0
mach_rd_next.RD_START 1 0 1
mach_rd_n
prev_cmp_davincihd.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
davincihd.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
action.c
/*
*************************************************************************
* Ralink Tech Inc.
* 4F, No. 2 Technology 5th Rd.
* Science-based Industrial Park
* Hsin-chu, Taiwan, R.O.C.
*
* (c)
freq.smp_dump.txt
State Machine - |Freq|Control:inst|present
Name present.flk_cnt present.start_flk present.fl0k_cnt present.start_fl0k present.fl00k_cnt present.start_fl00k
present.start_fl0k 0 0 0 0 0 0
presen
spi_master_interface_bt_top.srr
$ Start of Compile
#Tue Mar 18 21:53:47 2008
Synplicity Verilog Compiler, version Compilers 2.6.0, Build 102R, built Jan 27 2004
Copyright (C) 1994-2004, Synplicity Inc. All Rights Reserved
@
spi_master_interface_bt_top.tlg
Selecting top level module spi_master_interface_bt_top
Synthesizing module mcu_interface
@N: CL201 :"D:\XILINX\SPI_T\SPI_COOLRUNNER_VER3\mcu_interface.v":125:3:125:8|Trying to extract state machine
de2_lcm_test.smp_dump.txt
State Machine - |DE2_LCM_Test|I2S_LCM_Config:u4|mSetup_ST
Name mSetup_ST.0000 mSetup_ST.0010 mSetup_ST.0001
mSetup_ST.0000 0 0 0
mSetup_ST.0001 1 0 1
mSetup_ST.0010 1 1 0
de2_lcm_test.smp_dump.txt
State Machine - |DE2_LCM_Test|I2S_LCM_Config:u4|mSetup_ST
Name mSetup_ST.0000 mSetup_ST.0010 mSetup_ST.0001
mSetup_ST.0000 0 0 0
mSetup_ST.0001 1 0 1
mSetup_ST.0010 1 1 0
de2_lcm_test.smp_dump.txt
State Machine - |DE2_LCM_Test|I2S_LCM_Config:u4|mSetup_ST
Name mSetup_ST.0000 mSetup_ST.0010 mSetup_ST.0001
mSetup_ST.0000 0 0 0
mSetup_ST.0001 1 0 1
mSetup_ST.0010 1 1 0