代码搜索：State Machine
找到约 10,000 项符合「State Machine」的源代码
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www.eeworm.com/read/14659/400844
v state3.v
//3-paragraph method to describe FSM
//Describe sequential state transition in the 1st sequential always block
//State transition conditions in the 2nd combinational always block
//Describe the FSM
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prj state3.prj
#-- Synplicity, Inc.
#-- Version Synplify Pro 8.1
#-- Project file C:\prj\FSM_abc\state3\state3.prj
#-- Written on Fri Dec 16 16:54:36 2005
#add_file options
add_file -verilog "state3.v"
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prj state_default.prj
#-- Synplicity, Inc.
#-- Version Synplify Pro 8.1
#-- Project file C:\prj\FSM_abc\state_default\state_default.prj
#-- Written on Fri Dec 16 16:56:06 2005
#add_file options
add_file -verilog "
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prd state_default.prd
#-- Synplicity, Inc.
#-- Version Synplify Pro 8.1
#-- Project file C:\prj\FSM_abc\state_default\state_default.prd
#-- Written on Fri Dec 16 16:56:06 2005
#
### Watch Implementation type ###
#
www.eeworm.com/read/14839/424788
c cpu_state.c
/*
* cpu_state.c
* Copyright (C) 2000-2003 Michel Lespinasse
* Copyright (C) 1999-2000 Aaron Holtzman
*
* This file is part of mpeg2dec, a free MPEG-2
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c dump_state.c
/*
* dump_state.c
* Copyright (C) 2000-2003 Michel Lespinasse
* Copyright (C) 1999-2000 Aaron Holtzman
*
* This file is part of mpeg2dec, a free MPEG-
www.eeworm.com/read/14839/424838