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(DELAYFILE (SDFVERSION "3.0") (DESIGN "serial") (DATE "Fri Jan 11 17:04:52 2008") (VENDOR "Xilinx") (PROGRAM "Xilinx SDF Writer") (VERSION "H.42") (DIVIDER /) (VOLTAGE 1.14:1.14:1.14)

`timescale 1ns / 1ps //////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 12:35:10 01/10/08 // Design Name: // Mo

Release 7.1.04i - par H.42 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. #Fri Jan 11 17:04:43 2008 # ## NOTE: This file is designed to be imported into a spreadsheet program # such as M

XILINX-XDB 0.1 STUB 0.1 ASCII XILINX-XDM V1.4 ###5772:XlxV32DM 3fff 1674eNrdWVtz2ziy/iupLT/ESY1DXHgTTlIj62ZVbMsjyY59HqIiQWrHO4mdtTN7Zsqa/PbT6AZJgKLieHbzMJsqEX1Bf2g0uptEvMdT/cDVD5KpgCkmFDsIhBIHTG

Release 7.1.04i - netgen H.42 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: netgen -intstyle ise -s 4 -pcf serial.pcf -sdf_anno true -w -ofmt verilog -sim serial.ncd seria

xst -intstyle ise -ifn __projnav/serial.xst -ofn serial.syr xst -intstyle ise -ifn __projnav/serial.xst -ofn serial.syr xst -intstyle ise -ifn __projnav/serial.xst -ofn serial.syr xst -intstyle ise

Release 7.1.04i - netgen H.42 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. Command Line: netgen -intstyle ise -s 4 -pcf serial.pcf -sdf_anno true -w -ofmt verilog -sim serial.ncd seria

Creating the nc1 file as track file

Xilinx Implementation Summary Design Overview

//---------------- xwj_Serial.c //---------------串口相关 //串口函数集,仅需做简单调用即可完成串口输入输出的处理,出入均设有缓冲区，大小可任意设置 void serial_init (); unsigned char getbyte(void); //从接收缓冲区取一个byte,如不想等待则在调用前检测inbufsign是否为1。