代码搜索结果

-------------------------------------------------------------------------------------- Timing Analyzer Summary --------------------------------------------------------------------------------------

Analysis & Synthesis Status : Successful - Thu Jun 12 12:28:13 2008 Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version Revision Name : serial Top-level Entity Name : serial Family

Assembler report for serial Thu Jun 12 12:28:22 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version --------------------- ; Table of Contents ; -------------------

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to

Fitter report for serial Thu Jun 12 12:28:19 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version --------------------- ; Table of Contents ; ---------------------

Extra Info: Performing register packing on registers with non-logic cell location assignments Extra Info: Completed register packing on registers with non-logic cell location assignments Extra Info:

-- -- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在 --PC机上安装一个串口调试工具来验证程序的功能。 -- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 --制器，10个bit是1位起始位，8个数据位，1个结束 --位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实 --现相应的波特率。程序当前设定的div_par 的值 ...

Classic Timing Analyzer report for serial Thu Jun 12 12:28:24 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version --------------------- ; Table of Contents ; -----

Analysis & Synthesis report for serial Thu Jun 12 12:28:13 2008 Quartus II Version 7.2 Build 175 11/20/2007 Service Pack 1 SJ Full Version --------------------- ; Table of Contents ; --------

-- Copyright (C) 1991-2006 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o