serial.map.eqn

-- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在 --PC机上安装一个串口调试工具来验证程序的功能。 -- 程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 --

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--B1_txd_reg is serial_test:inst|txd_reg
--operation mode is normal

B1_txd_reg_lut_out = B1L60 & !B1L137 & (B1_txd_reg # !B1L134) # !B1L60 & (B1_txd_reg);
B1_txd_reg = DFFEAS(B1_txd_reg_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_rxd_buf[7] is serial_test:inst|rxd_buf[7]
--operation mode is normal

B1_rxd_buf[7]_lut_out = B1_rxd_reg2;
B1_rxd_buf[7] = DFFEAS(B1_rxd_buf[7]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[6] is serial_test:inst|rxd_buf[6]
--operation mode is normal

B1_rxd_buf[6]_lut_out = B1_rxd_buf[7];
B1_rxd_buf[6] = DFFEAS(B1_rxd_buf[6]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[5] is serial_test:inst|rxd_buf[5]
--operation mode is normal

B1_rxd_buf[5]_lut_out = B1_rxd_buf[6];
B1_rxd_buf[5] = DFFEAS(B1_rxd_buf[5]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[4] is serial_test:inst|rxd_buf[4]
--operation mode is normal

B1_rxd_buf[4]_lut_out = B1_rxd_buf[5];
B1_rxd_buf[4] = DFFEAS(B1_rxd_buf[4]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[3] is serial_test:inst|rxd_buf[3]
--operation mode is normal

B1_rxd_buf[3]_lut_out = B1_rxd_buf[4];
B1_rxd_buf[3] = DFFEAS(B1_rxd_buf[3]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[2] is serial_test:inst|rxd_buf[2]
--operation mode is normal

B1_rxd_buf[2]_lut_out = B1_rxd_buf[3];
B1_rxd_buf[2] = DFFEAS(B1_rxd_buf[2]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[1] is serial_test:inst|rxd_buf[1]
--operation mode is normal

B1_rxd_buf[1]_lut_out = B1_rxd_buf[2];
B1_rxd_buf[1] = DFFEAS(B1_rxd_buf[1]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_rxd_buf[0] is serial_test:inst|rxd_buf[0]
--operation mode is normal

B1_rxd_buf[0]_lut_out = B1_rxd_buf[1];
B1_rxd_buf[0] = DFFEAS(B1_rxd_buf[0]_lut_out, B1_clkbaud8x, reset, , B1L90, , , , );


--B1_div8_tras_reg[2] is serial_test:inst|div8_tras_reg[2]
--operation mode is normal

B1_div8_tras_reg[2]_lut_out = B1_div8_tras_reg[2] $ (B1_trasstart & B1_div8_tras_reg[1] & B1_div8_tras_reg[0]);
B1_div8_tras_reg[2] = DFFEAS(B1_div8_tras_reg[2]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_div8_tras_reg[1] is serial_test:inst|div8_tras_reg[1]
--operation mode is normal

B1_div8_tras_reg[1]_lut_out = B1_div8_tras_reg[1] $ (B1_trasstart & B1_div8_tras_reg[0]);
B1_div8_tras_reg[1] = DFFEAS(B1_div8_tras_reg[1]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_div8_tras_reg[0] is serial_test:inst|div8_tras_reg[0]
--operation mode is normal

B1_div8_tras_reg[0]_lut_out = B1_trasstart $ B1_div8_tras_reg[0];
B1_div8_tras_reg[0] = DFFEAS(B1_div8_tras_reg[0]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L60 is serial_test:inst|Equal~275
--operation mode is normal

B1L60 = B1_div8_tras_reg[2] & B1_div8_tras_reg[1] & B1_div8_tras_reg[0];


--B1_state_tras[3] is serial_test:inst|state_tras[3]
--operation mode is normal

B1_state_tras[3]_lut_out = B1_state_tras[3] $ (B1_state_tras[2] & B1L60 & B1L68);
B1_state_tras[3] = DFFEAS(B1_state_tras[3]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_state_tras[2] is serial_test:inst|state_tras[2]
--operation mode is normal

B1_state_tras[2]_lut_out = B1_state_tras[2] $ (B1_state_tras[1] & B1_state_tras[0] & B1L60);
B1_state_tras[2] = DFFEAS(B1_state_tras[2]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_state_tras[1] is serial_test:inst|state_tras[1]
--operation mode is normal

B1_state_tras[1]_lut_out = B1_state_tras[1] $ (B1L60 & B1_state_tras[0]);
B1_state_tras[1] = DFFEAS(B1_state_tras[1]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_state_tras[0] is serial_test:inst|state_tras[0]
--operation mode is normal

B1_state_tras[0]_lut_out = B1_state_tras[0] & (!B1L60) # !B1_state_tras[0] & B1L60 & (B1_state_tras[1] # B1L69);
B1_state_tras[0] = DFFEAS(B1_state_tras[0]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L113 is serial_test:inst|trasstart~473
--operation mode is normal

B1L113 = !B1_state_tras[3] & !B1_state_tras[2] & !B1_state_tras[1] & !B1_state_tras[0];


--B1_send_state[0] is serial_test:inst|send_state[0]
--operation mode is normal

B1_send_state[0]_lut_out = B1_send_state[0] $ (B1L60 & B1L68 & B1L70);
B1_send_state[0] = DFFEAS(B1_send_state[0]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_send_state[2] is serial_test:inst|send_state[2]
--operation mode is normal

B1_send_state[2]_lut_out = B1_send_state[2] $ (B1_send_state[1] & B1L96);
B1_send_state[2] = DFFEAS(B1_send_state[2]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_send_state[1] is serial_test:inst|send_state[1]
--operation mode is normal

B1_send_state[1]_lut_out = B1_send_state[1] $ B1L96;
B1_send_state[1] = DFFEAS(B1_send_state[1]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L133 is serial_test:inst|txd_reg~769
--operation mode is normal

B1L133 = B1_send_state[0] & B1_send_state[2] & B1_send_state[1];


--B1_trasstart is serial_test:inst|trasstart
--operation mode is normal

B1_trasstart_lut_out = B1L117 # B1L115 # B1_trasstart & B1L71;
B1_trasstart = DFFEAS(B1_trasstart_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L134 is serial_test:inst|txd_reg~770
--operation mode is normal

B1L134 = B1L113 & (B1L133 # !B1_trasstart);


--B1_txd_buf[0] is serial_test:inst|txd_buf[0]
--operation mode is normal

B1_txd_buf[0]_lut_out = B1L122 & (B1_txd_buf[1]) # !B1L122 & !B1L73;
B1_txd_buf[0] = DFFEAS(B1_txd_buf[0]_lut_out, B1_clkbaud8x, reset, , B1L124, , , , );


--B1L135 is serial_test:inst|txd_reg~771
--operation mode is normal

B1L135 = B1_state_tras[3] $ (B1_state_tras[2] # B1_state_tras[1] # B1_txd_buf[0]);


--B1L136 is serial_test:inst|txd_reg~772
--operation mode is normal

B1L136 = B1_state_tras[3] & (B1_state_tras[2] # B1_state_tras[1]) # !B1_state_tras[3] & (B1_txd_buf[0]);


--B1L137 is serial_test:inst|txd_reg~773
--operation mode is normal

B1L137 = B1L135 & (!B1L136) # !B1L135 & (B1L136 & (!B1_txd_reg) # !B1L136 & B1_state_tras[0]);


--B1_clkbaud8x is serial_test:inst|clkbaud8x
--operation mode is normal

B1_clkbaud8x_lut_out = B1_clkbaud8x $ B1L66;
B1_clkbaud8x = DFFEAS(B1_clkbaud8x_lut_out, clk, reset, , , , , , );


--B1_rxd_reg2 is serial_test:inst|rxd_reg2
--operation mode is normal

B1_rxd_reg2_lut_out = B1_rxd_reg1;
B1_rxd_reg2 = DFFEAS(B1_rxd_reg2_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_div8_rec_reg[2] is serial_test:inst|div8_rec_reg[2]
--operation mode is normal

B1_div8_rec_reg[2]_lut_out = B1_div8_rec_reg[2] $ (B1_div8_rec_reg[1] & B1_div8_rec_reg[0] & B1_recstart);
B1_div8_rec_reg[2] = DFFEAS(B1_div8_rec_reg[2]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_div8_rec_reg[1] is serial_test:inst|div8_rec_reg[1]
--operation mode is normal

B1_div8_rec_reg[1]_lut_out = B1_div8_rec_reg[1] $ (B1_div8_rec_reg[0] & B1_recstart);
B1_div8_rec_reg[1] = DFFEAS(B1_div8_rec_reg[1]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_div8_rec_reg[0] is serial_test:inst|div8_rec_reg[0]
--operation mode is normal

B1_div8_rec_reg[0]_lut_out = B1_div8_rec_reg[0] $ B1_recstart;
B1_div8_rec_reg[0] = DFFEAS(B1_div8_rec_reg[0]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L89 is serial_test:inst|rxd_buf[7]~254
--operation mode is normal

B1L89 = B1_div8_rec_reg[2] & B1_div8_rec_reg[1] & B1_div8_rec_reg[0];


--B1_state_rec[2] is serial_test:inst|state_rec[2]
--operation mode is normal

B1_state_rec[2]_lut_out = B1L103 & B1_state_rec[2] # !B1L103 & !B1L106 & (B1_state_rec[2] $ B1L1);
B1_state_rec[2] = DFFEAS(B1_state_rec[2]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_state_rec[1] is serial_test:inst|state_rec[1]
--operation mode is normal

B1_state_rec[1]_lut_out = B1L103 & B1_state_rec[1] # !B1L103 & !B1L106 & (B1_state_rec[1] $ B1_state_rec[0]);
B1_state_rec[1] = DFFEAS(B1_state_rec[1]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L61 is serial_test:inst|Equal~276
--operation mode is normal

B1L61 = !B1_state_rec[2] & !B1_state_rec[1];


--B1_state_rec[0] is serial_test:inst|state_rec[0]
--operation mode is normal

B1_state_rec[0]_lut_out = B1_state_rec[0] & (B1L101 # B1L102) # !B1_state_rec[0] & !B1L101 & !B1L102 & !B1L106;
B1_state_rec[0] = DFFEAS(B1_state_rec[0]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1_state_rec[3] is serial_test:inst|state_rec[3]
--operation mode is normal

B1_state_rec[3]_lut_out = B1L103 & B1_state_rec[3] # !B1L103 & !B1L106 & (B1_state_rec[3] $ B1L2);
B1_state_rec[3] = DFFEAS(B1_state_rec[3]_lut_out, B1_clkbaud8x, reset, , , , , , );


--B1L90 is serial_test:inst|rxd_buf[7]~255
--operation mode is normal

B1L90 = B1L89 & (B1_state_rec[3] $ (B1_state_rec[0] # !B1L61));


--B1L68 is serial_test:inst|Mux~2284
--operation mode is normal

B1L68 = B1_state_tras[1] & B1_state_tras[0];


--B1L69 is serial_test:inst|Mux~2287
--operation mode is normal

B1L69 = B1_state_tras[2] # B1_state_tras[3] # B1_trasstart & !B1L133;


--B1L70 is serial_test:inst|Mux~2289
--operation mode is normal

B1L70 = B1_state_tras[3] & B1_state_tras[2];


--B1L96 is serial_test:inst|send_state[1]~364
--operation mode is normal

B1L96 = B1_send_state[0] & B1L60 & B1L68 & B1L70;


--B1L71 is serial_test:inst|Mux~2290
--operation mode is normal

B1L71 = B1_state_tras[1] & (!B1_state_tras[3]) # !B1_state_tras[1] & (B1_state_tras[2] & (!B1_state_tras[3]) # !B1_state_tras[2] & (B1_state_tras[0] # B1_state_tras[3]));


--B1L114 is serial_test:inst|trasstart~474
--operation mode is normal

B1L114 = B1L113 & (B1_trasstart # !B1L133 & !B1L71);


--B1L72 is serial_test:inst|Mux~2291
--operation mode is normal

B1L72 = B1_state_tras[3] & (!B1_state_tras[2]);


--B1L115 is serial_test:inst|trasstart~475
--operation mode is normal

B1L115 = B1L114 # B1_state_tras[1] & B1_trasstart & B1L72;


--B1L73 is serial_test:inst|Mux~2292
--operation mode is normal

B1L73 = B1_send_state[2] & (!B1_send_state[1]) # !B1_send_state[2] & (B1_send_state[1] # !B1_send_state[0]) # !B1_state_tras[1];


--B1L122 is serial_test:inst|txd_buf[2]~2386
--operation mode is normal

B1L122 = !B1_state_tras[1] & (B1_state_tras[2] # !B1_state_tras[0]) # !B1_state_tras[3];


--B1_txd_buf[1] is serial_test:inst|txd_buf[1]
--operation mode is normal

B1_txd_buf[1]_lut_out = B1L74 & !B1L75 & (B1_txd_buf[2] # !B1L122) # !B1L74 & (B1_txd_buf[2] # !B1L122);
B1_txd_buf[1] = DFFEAS(B1_txd_buf[1]_lut_out, B1_clkbaud8x, reset, , B1L124, , , , );


--B1L123 is serial_test:inst|txd_buf[2]~2387
--operation mode is normal

B1L123 = B1_state_tras[0] & B1_state_tras[3] & (B1_state_tras[2] $ B1_state_tras[1]) # !B1_state_tras[0] & (B1_state_tras[3] $ (!B1_state_tras[2] & !B1_state_tras[1]));


--B1_div_reg[15] is serial_test:inst|div_reg[15]
--operation mode is normal

B1_div_reg[15]_lut_out = B1L3;
B1_div_reg[15] = DFFEAS(B1_div_reg[15]_lut_out, clk, reset, , , , , , );


--B1_div_reg[14] is serial_test:inst|div_reg[14]
--operation mode is normal

B1_div_reg[14]_lut_out = B1L4;
B1_div_reg[14] = DFFEAS(B1_div_reg[14]_lut_out, clk, reset, , , , , , );


--B1_div_reg[13] is serial_test:inst|div_reg[13]
--operation mode is normal

B1_div_reg[13]_lut_out = B1L6;
B1_div_reg[13] = DFFEAS(B1_div_reg[13]_lut_out, clk, reset, , , , , , );


--B1_div_reg[12] is serial_test:inst|div_reg[12]
--operation mode is normal

B1_div_reg[12]_lut_out = B1L8;
B1_div_reg[12] = DFFEAS(B1_div_reg[12]_lut_out, clk, reset, , , , , , );


--B1L62 is serial_test:inst|Equal~277
--operation mode is normal

B1L62 = !B1_div_reg[15] & !B1_div_reg[14] & !B1_div_reg[13] & !B1_div_reg[12];


--B1_div_reg[11] is serial_test:inst|div_reg[11]
--operation mode is normal

B1_div_reg[11]_lut_out = B1L10;
B1_div_reg[11] = DFFEAS(B1_div_reg[11]_lut_out, clk, reset, , , , , , );


--B1_div_reg[10] is serial_test:inst|div_reg[10]
--operation mode is normal

B1_div_reg[10]_lut_out = B1L12;
B1_div_reg[10] = DFFEAS(B1_div_reg[10]_lut_out, clk, reset, , , , , , );


--B1_div_reg[9] is serial_test:inst|div_reg[9]
--operation mode is normal

B1_div_reg[9]_lut_out = B1L14;
B1_div_reg[9] = DFFEAS(B1_div_reg[9]_lut_out, clk, reset, , , , , , );


--B1_div_reg[8] is serial_test:inst|div_reg[8]
--operation mode is normal

B1_div_reg[8]_lut_out = B1L16;
B1_div_reg[8] = DFFEAS(B1_div_reg[8]_lut_out, clk, reset, , , , , , );


--B1L63 is serial_test:inst|Equal~278
--operation mode is normal

B1L63 = !B1_div_reg[11] & !B1_div_reg[10] & !B1_div_reg[9] & !B1_div_reg[8];


--B1_div_reg[4] is serial_test:inst|div_reg[4]
--operation mode is normal

B1_div_reg[4]_lut_out = B1L18 & (!B1L66);
B1_div_reg[4] = DFFEAS(B1_div_reg[4]_lut_out, clk, reset, , , , , , );


--B1_div_reg[7] is serial_test:inst|div_reg[7]
--operation mode is normal

B1_div_reg[7]_lut_out = B1L20;
B1_div_reg[7] = DFFEAS(B1_div_reg[7]_lut_out, clk, reset, , , , , , );


--B1_div_reg[6] is serial_test:inst|div_reg[6]
--operation mode is normal

B1_div_reg[6]_lut_out = B1L22;
B1_div_reg[6] = DFFEAS(B1_div_reg[6]_lut_out, clk, reset, , , , , , );


--B1_div_reg[5] is serial_test:inst|div_reg[5]
--operation mode is normal

B1_div_reg[5]_lut_out = B1L24;
B1_div_reg[5] = DFFEAS(B1_div_reg[5]_lut_out, clk, reset, , , , , , );


--B1L64 is serial_test:inst|Equal~279
--operation mode is normal

B1L64 = B1_div_reg[4] & !B1_div_reg[7] & !B1_div_reg[6] & !B1_div_reg[5];


--B1_div_reg[3] is serial_test:inst|div_reg[3]
--operation mode is normal