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control_interface.vhd

-- -- -- LOGIC CORE: Control Interface - Top level module -- MODULE NAME: control_interface() -- COMPANY: Northwest Logic, Inc. -- www

frequency_control.vhdl

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity control is Port ( Bsignal : in std_logic; Gate : out std_logic;

threedim_control.mdl

# $Revision: 1.7.4.4 $ # $Date: 2004/01/22 18:38:12 $ # $Author: batserve $ # Copyright 1998-2004 HUMUSOFT s.r.o. and The MathWorks, Inc. Model { Name "threedim_control" Version 6.0

dc_control.cmd

MEMORY { PAGE 0 : VECS : origin = 0h , length = 040h /* VECTORS */ PROG : origin = 44h , length = 07700h /* PROGRAM */ DATA : origin =