代码搜索：Process

找到约 10,000 项符合「Process」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/259758/11767691

vhd prtsim.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY PRTSIM IS PORT (RDY: BUFFER STD_LOGIC; TR, CLK, R: IN STD_LOGIC); END PRTSIM; ARCHITECTURE BEHAVIOR OF PRTSIM IS SIGNAL COUNT: INTEGER RAN
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www.eeworm.com/read/346087/11769570

plg gsmpt.plg

Build target 'Target 1' compiling OS_CORE.C... compiling OS_Q.C... compiling OS_CPU_C.C... assembling OS_CPU_A.ASM... compiling main.c... SERIAL.C(72): error C202: 'TC35IGT': undefined identifier SERI
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www.eeworm.com/read/156773/11776319

vhd send.vhd

LIBRARY ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity send is port(CS,A0,RD,WR:in std_logic; TXC,reset:in std_logic; d_in:in std_logic_vector(7 downto 0);
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www.eeworm.com/read/345854/11785820

vhd clkgen.vhd

library ieee; use ieee.std_logic_1164.all; entity clkgen is port(clk:in std_logic; newclk:out std_logic); end entity clkgen; architecture art of clkgen is signal cnter:integer ra
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www.eeworm.com/read/259453/11789427

vhd fredivn.vhd

--evev frequency division library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity fredivn is GENERIC (N:integer:=8); port (clk:in std
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www.eeworm.com/read/156459/11801225

cpp d10r1.cpp

#include #include #include #include double func(double x) { double t; t=bessj0( x); return t; } void main() { //program d10r1
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www.eeworm.com/read/345332/11820380

plg 11.1.plg

Build target 'Target 1' compiling 11.1.c... linking... *** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS SEGMENT: ?PR?SEND?11_1 "11.1" - 0 Error(s), 1 Warning(s).
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www.eeworm.com/read/345332/11820425

m51 14-1.m51

BL51 BANKED LINKER/LOCATER V4.20 09/02/2001 15:12:55 PAGE 1 BL51 BANKED LINKER/LOCATER V4.20, INVOKED BY: C:\KEIL\C51\BIN\BL51.EXE 14-1.o
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www.eeworm.com/read/345332/11820434

plg 14-1.plg

Build target 'Target 1' compiling 14-1.c... linking... *** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS SEGMENT: ?PR?READDATA?14_1 *** WARNING L15: MULTIPLE CALL TO SEGMENT SEGM
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www.eeworm.com/read/345332/11820677

plg 10.1.plg

Build target 'Target 1' compiling 10.1.c... linking... *** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS SEGMENT: ?PR?_DAQ?10_1 *** WARNING L10: CANNOT DETERMINE ROOT SEGMENT "10.1"
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