代码搜索：Process
找到约 10,000 项符合「Process」的源代码
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www.eeworm.com/read/355467/10262901
vhd 25_test_1a.vhd
-- Page : 318 _ 319
--
-- Objective : Reference for Test_1a,1b,1d, and 1e
--
-- File Name : test_1.vhd
--
-- Author : Joseph Pick
--
entity Test_1 is
end Test_1;
architecture
www.eeworm.com/read/355457/10263017
vhd 8_bit_rtl_lib.vhd
use work.bit_rtl_pkg.all;
--------------------------------------
-- MUX2
-- 2 select 1 multiplexer
--------------------------------------
entity bit_rtl_mux2 is port (
in1 : in bit_vector;
www.eeworm.com/read/355301/10277593
plg bit.plg
礦ision3 Build Log
Project:
d:\我的文档\桌面\bits\bit.uv2
Project File Date: 09/02/2008
Output:
Build target 'Target 1'
assembling STARTUP.A51...
l
www.eeworm.com/read/162704/10281238
vhd top.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity full_adder is --????
Port ( a,b,cin: in bit; --?????????
s,cout: out bit); --?????????
end fu
www.eeworm.com/read/425963/10304516
cs calculator.cs
using System;
using System.Collections.Generic;
using System.Text;
namespace ConsoleApplication1
{
class Program
{
static void Main(string[] args)
{
www.eeworm.com/read/355007/10306311
c execl.c
#include
#include
void main(void)
{
printf("About to call child process\n\n");
execl("CHILD.EXE", "CHILD.EXE",
"AAA", "BBB", "CCC", NULL);
printf("\n\nBa
www.eeworm.com/read/354981/10308398
vhd mult242.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
ENTITY mult242 is
PORT
( clk : IN STD_LOGIC;
Din : IN SIGNED (8 DOWNTO 0);
Dout : OUT SIGNED (15 DOWNTO 0));
END
www.eeworm.com/read/354981/10308499
rpt fir.map.rpt
Analysis & Synthesis report for fir
Wed Mar 05 21:21:32 2008
Version 5.0 Build 148 04/26/2005 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Not
www.eeworm.com/read/354981/10308755
qmsg fir.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info:
www.eeworm.com/read/354981/10308824
vhd mult162.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
ENTITY mult162 is
PORT
( clk : IN STD_LOGIC;
Din : IN SIGNED (8 DOWNTO 0);
Dout : OUT SIGNED (15 DOWNTO 0));
END