代码搜索:Numeric

找到约 7,754 项符合「Numeric」的源代码

代码结果 7,754
www.eeworm.com/read/102471/15780238

vhd cslt_cntr.vhd

library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_STD.all; use IEEE.std_logic_unsigned.all; entity rcd_cntr is port (rcd_end : out std_logic; Reset : in std_logic; Clk : in std_logic;
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vhd rcd_cntr.vhd

library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_STD.all; use IEEE.std_logic_unsigned.all; entity cslt_cntr is port (cslt_end : out std_logic; Reset : in std_logic; Clk : in std_logi
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vhd ki_cntr.vhd

library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_STD.all; use IEEE.std_logic_unsigned.all; entity ki_cntr is port (ki_end : out std_logic; Reset : in std_logic; Clk : in std_logic;
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m s2d.m

function d = s2d (matrix,q,o) %S2D(Matrix, qrand(), option) Symbolic values (sym) to numeric values (double) % 1 - D0 = s2d(M, qrand()) % 2 - D0 = s2d(M, qrand(), 'var') %July ~ December
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vhd alt_cusp72_muxhot64_wire.vhd

-- alt_cusp72_muxhot64_wire.vhd library ieee, altera; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use std.textio.all; use altera.alt_cusp72_package.all; entity alt_cusp72_muxhot64
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vhd alt_cusp72_muxhot16_wire.vhd

-- alt_cusp72_muxhot16_wire.vhd library ieee, altera; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use std.textio.all; use altera.alt_cusp72_package.all; entity alt_cusp72_muxhot16
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vhd alt_cusp72_muxbin2_wire.vhd

-- alt_cusp72_muxbin2_wire.vhd library ieee, altera; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use std.textio.all; use altera.alt_cusp72_package.all; entity alt_cusp72_muxbin2_w
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bak heartbeat.vhd.bak

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity heartbeat is port( clk:in std_logic; d0,d1,d2,d3:out std_logic_vector(3 downto 0) ); end heartbeat; a
www.eeworm.com/read/371617/9545494

vhd heartbeat.vhd

llibrary ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity heartbeat is port( clk:in std_logic; d0,d1,d2,d3:out std_logic_vector(3 downto 0) ); end heartbeat;
www.eeworm.com/read/371617/9545614

bak heartbeat.vhd.bak

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity heartbeat is port( clk:in std_logic; d0,d1,d2,d3:out std_logic_vector(3 downto 0) ); end heartbeat; a