代码搜索：Modulator
找到约 415 项符合「Modulator」的源代码
代码结果 415
www.eeworm.com/read/286614/8755465
transcript
# Reading D:/Modeltech_6.2a/tcl/vsim/pref.tcl
# // ModelSim SE 6.2a Jun 16 2006
# //
# // Copyright 2006 Mentor Graphics Corporation
# // All Rights Reserved.
# //
# // THIS WO
www.eeworm.com/read/375115/9372166
pdf improved modeling of sigma-delta modulator non-idealities in simulink.pdf
www.eeworm.com/read/136849/5844159
h lcc_modulate.h
/******************************************************************************
* Power Task (pwr)
* Design and coding by Svend Kristian Lindholm, skl@ti.com
*
* PWR SW Modulation
*
* $Id:
www.eeworm.com/read/172695/9696337
m stbc_ofdm_csi_two_block_fast.m
%==========================================================================
% "Channel estimation via training in time domain and tracking in frequcy
% domain for STBC-OFDM(Two OFDM symbols) Systems"
www.eeworm.com/read/172695/9696404
asv stbc_ofdm_csi_two_block_fast.asv
%==========================================================================
% "Channel estimation via training in time domain and tracking in frequcy
% domain for STBC-OFDM(Two OFDM symbols) Systems"
www.eeworm.com/read/463357/7182834
c transmitter.c
#include "const.h"
void transmitter(int (*bit), double (*signal)[2]){
bit_generator(bit);
QPSK_modulator(bit, signal);
}
void bit_generator(int (*bit)){
int n;
for(n=0; n
www.eeworm.com/read/448184/7538472
c transmitter.c
#include "const.h"
void transmitter(int (*bit), double (*signal)[2]){
bit_generator(bit);
QPSK_modulator(bit, signal);
}
void bit_generator(int (*bit)){
int n;
for(n=0; n
www.eeworm.com/read/490562/6447511
c transmitter.c
#include "const.h"
void transmitter(int (*bit), double (*signal)[2]){
bit_generator(bit);
QPSK_modulator(bit, signal);
}
void bit_generator(int (*bit)){
int n;
for(n=0; n
www.eeworm.com/read/286614/8755536
txt sram_ctrl_readme.txt
The following files were generated for 'sram_ctrl' in directory
E:\modulator\modulator_fpga\modulator:
sram_ctrl.mif:
Memory Initialization File which is automatically generated by the
CO
www.eeworm.com/read/286614/8755355
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity modulator is
port(
gclk : in vl_logic;
ex_pm : in vl_logic;
ex_bds : in vl_logic