代码搜索:Maxplus

找到约 394 项符合「Maxplus」的源代码

代码结果 394
www.eeworm.com/read/252132/12300430

vhd flipflop.vhd

LIBRARY ieee ; USE ieee.std_logic_1164.all ; LIBRARY altera ; USE altera.maxplus2.all ; ENTITY flipflop IS PORT ( D, Clock : IN STD_LOGIC ; Resetn, Presetn : IN STD_LOGIC ;
www.eeworm.com/read/415793/11053706

vhd flipflop.vhd

LIBRARY ieee ; USE ieee.std_logic_1164.all ; LIBRARY altera ; USE altera.maxplus2.all ; ENTITY flipflop IS PORT ( D, Clock : IN STD_LOGIC ; Resetn, Presetn : IN STD_LOGIC ;
www.eeworm.com/read/422532/10631572

vhd compinst.vhd

-- MAX+plus II VHDL Example -- Component Instantiation Statement -- Copyright (c) 1994 Altera Corporation LIBRARY altera; USE altera.maxplus2.ALL; LIBRARY ieee; USE ieee.std_logic_1164.ALL;
www.eeworm.com/read/159105/10694972

vhd compinst.vhd

-- MAX+plus II VHDL Example -- Component Instantiation Statement -- Copyright (c) 1994 Altera Corporation LIBRARY altera; USE altera.maxplus2.ALL; LIBRARY ieee; USE ieee.std_logic_1164.ALL;
www.eeworm.com/read/399935/7821215

vhd compinst.vhd

-- MAX+plus II VHDL Example -- Component Instantiation Statement -- Copyright (c) 1994 Altera Corporation LIBRARY altera; USE altera.maxplus2.ALL; LIBRARY ieee; USE ieee.std_logic_1164.ALL;
www.eeworm.com/read/402992/11525392

vhd keyboard.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL ; USE IEEE.STD_LOGIC_UNSIGNED.ALL ; LIBRARY altera; USE altera.maxplus2.ALL; -- --*************************************
www.eeworm.com/read/402992/11525444

vhd ch3_4_1.vhd

-- ******************************************** LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; LIBRARY Altera; USE Altera.maxplus2.al
www.eeworm.com/read/252132/12300299

vhd flipflop.vhd

LIBRARY ieee ; USE ieee.std_logic_1164.all ; LIBRARY altera ; USE altera.maxplus2.all ; ENTITY flipflop IS PORT ( D, Clock : IN STD_LOGIC ; Resetn, Presetn : IN STD_LOGIC ; Q
www.eeworm.com/read/232914/14178055

vhd elec_lock.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL ; USE IEEE.STD_LOGIC_UNSIGNED.ALL ; LIBRARY altera; USE altera.maxplus2.ALL; --*************************************
www.eeworm.com/read/126327/14428601

vhd compinst.vhd

-- MAX+plus II VHDL Example -- Component Instantiation Statement -- Copyright (c) 1994 Altera Corporation LIBRARY altera; USE altera.maxplus2.ALL; LIBRARY ieee; USE ieee.std_logic_1164.ALL;