代码搜索：MIXED-SIGNAL

找到约 40 项符合「MIXED-SIGNAL」的源代码

代码结果 40
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
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c main.c

/*****************************************************************************************/ // // Name: BF533 EZ-KIT interface to the AD9866 Mixed-Signal Front-End Evaluation Board // /*********
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c main.c

/*****************************************************************************************/ // // Name: BF537 EZ-KIT interface to the AD9866 Mixed-Signal Front-End Evaluation Board // /*********
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sp fig33_18.sp

* Figure 33.18 CMOS: Mixed-Signal Circuit Design * * Using the EKV model * * Comparison between strong, moderate, and weak inversion * * using an R-2R (W-2W) based current mirror (see text.) * *
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sp fig33_19.sp

* Figure 33.19 CMOS: Mixed-Signal Circuit Design * * Using the BSIM4 model * * Comparison between strong, moderate, and weak inversion * * using an R-2R (W-2W) based current mirror (see text.) *
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tech smic018.tech

; SMIC 0.18um Logic/Mixed-Signal/RF Salicide (1P6M, Thick Top Metal, 1.8V/3.3V) process chipx = 1024 ; dimensions of the chip in x direction chipy = 1024 ; dimensions of the chip in y dire
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sp fig33_64.sp

* Figure 33.64 CMOS: Mixed-Signal Circuit Design * .option scale=0.15u post Vdd Vdd 0 DC 1.5 Vin Vin 0 DC 0 .dc Vin 0 1.5 .001 X1 Vin Vout Vdd inverter .subckt inverter Vin Vout Vdd
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sp fig33_63.sp

* Figure 33.63 CMOS: Mixed-Signal Circuit Design * .option scale=0.15u post Vdd Vdd 0 DC 1.5 Vin Vin 0 DC 0 .dc Vin 0 1.5 .01 X1 Vin Vout Vdd inverter .subckt inverter Vin Vout Vdd M
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sp fig33_37.sp

* Figure 33.37 CMOS: Mixed-Signal Circuit Design * .option scale=0.15u post Vdd Vdd 0 DC 1.5 Vin Vin 0 DC 0 .dc Vin 0 1.5 .01 X1 Vin Vout Vdd inverter .subckt inverter Vin Vout Vdd M
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sp fig33_62.sp

* Figure 33.62 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 Vinm Vinm 0 DC 0.75 .DC Vinp 0.6 0.9 .001 temp 0 100 25 .options scale=0.15u post X1 Vbiasn Vbiasp Vd
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sp fig33_71.sp

* Figure 33.71 CMOS: Mixed-Signal Circuit Design * Vdd Vdd 0 DC 1.5 Vinp Vinp 0 DC 0.75 AC 1 Vinm Vinm 0 DC 0.75 .DC Vinp 0.74 0.76 1u .options scale=0.15u post *main circuit X1 Vot1 Vob1
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