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Logic Analyzer 的代码
msscomppackage.vhd
-- *****************************************************************************************
-- Components for ARM memory subsystem (simulation)
-- Designed by Ruslan Lepetenok
-- Modified 02.02.20
mulctrlandregs.vhd
--****************************************************************************************************
-- Multiplier control and Partial Sum/Carry registers for ARM core
-- Designed by Ruslan Lepete
multipliertestadder.vhd
--****************************************************************************************************
-- Adder for multiplier tester for ARM core
-- Designed by Ruslan Lepetenok
-- Modified 27.01.
arm7tdmis_top.vhd
--****************************************************************************************************
-- Top entity for ARM7TDMI-S processor
-- Designed by Ruslan Lepetenok
-- Modified 12.02.2003
multiplier.vhd
--****************************************************************************************************
-- Multiplier for ARM core
-- Designed by Ruslan Lepetenok
-- Modified 12.02.2003
--*********
ad_7266_32.vhd
------------------------------------------------------------------------------
-- ad_7266_32.vhd - entity/architecture pair
--------------------------------------------------------------------------
and2.vhd
library IEEE;
use IEEE.std_logic_1164.all;
entity and2 is
port (
c: out STD_LOGIC;
a: in STD_LOGIC;
b: in STD_LOGIC
);
end and2;
architecture and2_arch of
keyscan66noreset
-- KEY BOARD
-------------------------------------
--000 *A* *B* *C* *D* *E* *F*
--001 *G* *H* *I* *J* *K* *L*
--010 *M* *N* *O* *P* *Q* *R*
--011 *S
加法器源程序.vhd
------------------------------------------------------------------------
-- Single-bit adder
------------------------------------------------------------------------
library IEEE;
use IEEE.std_log
加法器描述.txt
-- A Variety of Adder Styles
-- download from: www.fpga.com.cn & www.pld.com.cn
------------------------------------------------------------------------
-- Single-bit adder
-----------------------