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找到约 10,000 项符合 Logic Analyzer 的代码

cnt_10.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY cnt_10 IS PORT(CLK :IN STD_LOGIC; reset :IN STD_LOGIC; en :IN STD_LOGIC; co:OUT STD_ULOGIC;

result.vhd

-- output of CoreGen module generator -- $Header: romrVHT.vhd,v 1.3 1998/06/15 16:22:02 tonyw Exp $ -- ***************************************************************** -- Copyright 1997-1998 - Xi

radd16.vhd

-- output of CoreGen module generator -- $Header: adreVHT.vhd,v 1.3 1998/06/15 17:52:34 tonyw Exp $ -- ************************************************************************ -- Copyright 1996-19

mux4w8.vhd

-- output of CoreGen module generator -- $Header: mux4VHT.vhd,v 1.2 1998/06/15 17:58:03 tonyw Exp $ -- ************************************************************************ -- Copyright 1996-19

rsub16.vhd

-- output of CoreGen module generator -- $Header: subreVHT.vhd,v 1.3 1998/06/15 17:53:11 tonyw Exp $ -- ************************************************************************ -- Copyright 1996-1

data_core.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for instantia

cfft.vhd

--------------------------------------------------------------------------------------------------- -- -- Title : cfft -- Design : cfft -- Author : ZHAO Ming -- email : sradio@o

serparser.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED.all; -- Uncomment the following lines to use the declarations that are -- provided for instantia

juntos.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED.all; -- Uncomment the following lines to use the declarations that are -- provided for instantia

top.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity top is port( TopClkMcu:in std_logic; TopDada:in std_logic; TopEn:in std_logic; TopClkDds:in std_lo