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Logic Analyzer 的代码
jtag_logic.pin
-- Copyright (C) 1991-2009 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and a
jtag_logic.vhd
-------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
----------------------------------------
jtag_logic.cdf
/* Quartus II Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Full Version */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EPM240T100) Path("E:/E
jtag_logic.done
Wed Sep 02 10:17:43 2009
jtag_logic.qsf
# Copyright (C) 1991-2008 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu
jtag_logic.vhdpreview
[Preview]
LargeImageOriginalSize=706000
LargeImageWidth=353
LargeImageHeight=500
LargeImage=78DAED9DEB99DBB81244371007E244261007E20C368289C0114C048E602270067B8DB92E6FB9B61B2425EA459D1FE71345910448
jtag_logic.qws
[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
jtag_logic.qpf
# Copyright (C) 1991-2008 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any outpu