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Logic Analyzer 的代码
shift_logic.vhd
--SINGLE_FILE_TAG
-------------------------------------------------------------------------------
-- $Id: shift_logic.vhd,v 1.1 2007/10/12 09:11:36 stefana Exp $
--------------------------------------
jtag_logic.bsf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
jtag_logic.vhd
-------------------------------------------------------------------------------
-- Serial/Parallel converter, interfacing JTAG chain with FTDI FT245BM
-----------------------------------------------
logic_legxbr.htm
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent la
logic_legxbr.htm
I/O Style - OD - OpenDrain
- PU - Pullup
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent la
math_logic.vhd
-- ============================================================
-- File Name: math_logic.vhd
-- ============================================================
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164
math_logic.vwf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to