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led.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to

led.vhd

--------------------------------------------------------------------------------------------------- --*************************************************************************************************

led.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity led is Port ( clk : in std_logic; -- Clock rstn

led.c

/*名称:LED8×8阵列显示 设计:陈仲库 日期:2007-11-2 技术支持:kuzi00@163.com qq:86828048 */ #include //阴码ni向逐行 unsigned char code tab[]={0xfe,0xfd,0xfb,0xf7,0xef,0xdf,0xbf,0x7f};//行选 unsigned char code

led.mak

/************* Code Composer V1 Project Data ******************** The following section contains data generated by Code Composer to store project information like build options, source filenames

led.c

/************************************************************************/ /* Testprogram for digital I/O on Port E */ /* running on TMS320LF2407 EVM */ /* external clock is 14.7

led.cmd

MEMORY { PAGE 0 : VECS : origin = 0h , length = 040h /* VECTORS */ PROG : origin = 40h , length = 0FFC0h /* PROGRAM */ PAGE 1 : MMRS : origin = 0h , len