代码搜索：LCD转VGA
找到约 10,000 项符合「LCD转VGA」的源代码
代码结果 10,000
www.eeworm.com/read/164056/10133219
sdf vga.sdf
(DELAYFILE
(SDFVERSION "OVI 2.1")
(DESIGN "VGA")
(DATE "123")
(VENDOR "A500K")
(PROGRAM "Synplify")
(VERSION "7.3, Build 206R")
(DIVIDER /)
(VOLTAGE 2.500000:2.500000:2.500000)
(PROCESS "TYPI
www.eeworm.com/read/164056/10133220
tlg vga.tlg
Synthesizing work.vga.a
Post processing for work.vga.a
@W:"D:\yjsj\vga\vga.vhd":62:0:62:1|Latch generated from process for signal pixel_row(10 downto 0), probably caused by a missing assignment in a
www.eeworm.com/read/164056/10133222
edf vga.edf
(edif (rename vga "VGA")
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2005 12 30 16 52 19)
(author "Synplicity, Inc.")
www.eeworm.com/read/164056/10133227
edn vga.edn
(edif VGA
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2005 11 24 9 17 30)
(author "Synplicity, Inc.")
(program "Sy
www.eeworm.com/read/164056/10133229
srr vga.srr
$ Start of Compile
#Fri Dec 30 16:52:18 2005
Synplicity VHDL Compiler, version Compilers 7.3, Build 036R, built Oct 1 2003
Copyright (C) 1994-2002, Synplicity Inc. All Rights Reserved
VHDL s
www.eeworm.com/read/164056/10133232
prd vga.prd
#-- Synplicity, Inc.
#-- Version 7.3.3
#-- Project file D:\yjsj\vga\vga.prd
#-- Written on Thu Dec 29 11:08:07 2005
#
### Watch Implementation type ###
#
watch_impl -active
#
### Watch
www.eeworm.com/read/164056/10133234
jpg vga.jpg
www.eeworm.com/read/163880/10141357
vga supervga.vga
www.eeworm.com/read/359078/10166721
c vga.c
#include
#include "system.h"
#include "VGA.h"
//-------------------------------------------------------------------------
void Set_Cursor_XY(unsigned int X,unsigned int Y)
{
Vga_Cursor_
www.eeworm.com/read/359078/10166724
h vga.h
#ifndef __VGA_H__
#define __VGA_H__
// VGA Parameter
#define VGA_WIDTH 640
#define VGA_HEIGHT 480
#define OSD_MEM_ADDR VGA_WIDTH*VGA_HEIGHT
// VGA Set Function
#define Vga_Wr