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Interface 的代码
dgl_interface.pas
(*
* Copyright (c) 2004
* HouSisong@263.net
*
* This material is provided "as is", with absolutely no warranty expressed
* or implied. Any use is at your own risk.
*
* Permission to use
control_interface.v
module control_interface(
CLK,
RESET_N,
CMD,
ADDR,
REF_ACK,
INIT_ACK,
CM_ACK,
NOP,
READA,
WRITEA,
REFRESH,
eeprom_interface.v
// i2c.vhd
//
// This file implements an I2C Master interface that will read data
// from an external NVM (AT24C02A) at power-up to initialize a 256x8
// internal SRAM block. When external logic r
eeprom_interface.vhd
-- i2c.vhd
--
-- This file implements an I2C Master interface that will read data
-- from an external NVM (AT24C02A) at power-up to initialize a 256x8
-- internal SRAM block. When external logic s
control_interface.v
module control_interface(
CLK,
RESET_N,
CMD,
ADDR,
REF_ACK,
INIT_ACK,
CM_ACK,
NOP,
READA,
WRITEA,
REFRESH,
control_interface.v
module control_interface(
CLK,
RESET_N,
CMD,
ADDR,
REF_ACK,
INIT_ACK,
CM_ACK,
NOP,
READA,
WRITEA,
REFRESH,