代码搜索：Inference
找到约 1,820 项符合「Inference」的源代码
代码结果 1,820
www.eeworm.com/read/136696/13365653
m quantize.m
function [xq]=quantize(x,q)
%QUANTIZE: To quantize the input matrix X with a quantum size Q, this
% function can be utilized. (Xq=X+Q/2)
%
% Xq=QUANTIZE(X,Q)
% FISMAT: Fuzzy Infe
www.eeworm.com/read/140847/5779493
m quickscore_inf_engine.m
function engine = quickscore_inf_engine(inhibit, leak, prior)
% QUICKSCORE_INF_ENGINE Exact inference for the QMR network
% engine = quickscore_inf_engine(inhibit, leak, prior)
%
% We create an infere
www.eeworm.com/read/133943/5897676
m quickscore_inf_engine.m
function engine = quickscore_inf_engine(inhibit, leak, prior)
% QUICKSCORE_INF_ENGINE Exact inference for the QMR network
% engine = quickscore_inf_engine(inhibit, leak, prior)
%
% We create an infere
www.eeworm.com/read/489686/6468813
v latchinf.v
// MAX+plus II Verilog Example
// Latch Inference
// Copyright (c) 1997 Altera Corporation
module latchinf(enable, data, q);
input enable, data;
output q;
reg q;
always @(
www.eeworm.com/read/401301/11559732
v latchinf.v
// MAX+plus II Verilog Example
// Latch Inference
// Copyright (c) 1997 Altera Corporation
module latchinf(enable, data, q);
input enable, data;
output q;
reg q;
always @(
www.eeworm.com/read/153543/12028761
vbp project1.vbp
Type=Exe
Reference=*\G{00020430-0000-0000-C000-000000000046}#2.0#0#C:\WINDOWS\system32\stdole2.tlb#OLE Automation
Reference=*\G{28D465A6-E11A-11D0-8698-00A0C90DC825}#1.0#0#C:\Program Files\MSRASI\bi
www.eeworm.com/read/254980/12110216
v latchinf.v
// MAX+plus II Verilog Example
// Latch Inference
// Copyright (c) 1997 Altera Corporation
module latchinf(enable, data, q);
input enable, data;
output q;
reg q;
always @(
www.eeworm.com/read/150225/12304046
m hsinference.m
function [Gamma,Gammasum,Xi]=hsinference(Xtrain,T,N,hmm)
% [Gamma,Gammasum,Xi]=hsinference(Xtrain,T,N,hmm,options)
%
% inference engine for HMMs.
%
% INPUT
%
% Xtrain observation sequence
% T
www.eeworm.com/read/338238/12317203
m compileinference.m
function compileInference(package)
if nargin==0,
package={'inference', 'full_factor_gbp', 'factor_gbp', 'gbp_preprocess', 'gbp'};
end
% compile c_inference - the whole inference package
www.eeworm.com/read/126327/14428479
v latchinf.v
// MAX+plus II Verilog Example
// Latch Inference
// Copyright (c) 1997 Altera Corporation
module latchinf(enable, data, q);
input enable, data;
output q;
reg q;
always @(