代码搜索:FreeDev

找到约 256 项符合「FreeDev」的源代码

代码结果 256
www.eeworm.com/read/418390/2089295

v freedev_aic23_自生成bclk读写.v

//--------------------------------------------------------- //杭州自由电子科技TLV320AIC23音频模块 //电话:0571-85084089 //网址:www.freefpga.com //邮件:jhljs@hotmail.com //开发日期:20060501 //简要说明: // 1、向上连接A
www.eeworm.com/read/340857/12130734

mk component.mk

# This file generated on 2006.08.17.22:45:13 C_LIB_SRCS += freedev_lan91c111.c ASM_LIB_SRCS += INCLUDE_PATH += # end of file
www.eeworm.com/read/340857/12130700

ptf class.ptf

# # This class.ptf file built by Component Editor # 2006.08.17.22:45:13 # # DO NOT MODIFY THIS FILE # If you hand-modify this file you will likely # interfere with Component Editor's ability to
www.eeworm.com/read/233971/14126937

c hello_world.c

/************************************************************** 程序说明 :usb1.1测试实验 类 型 :Nios II 作 者 :柳军胜 公 司 :杭州自由电子科技 :http://www.freefpga.com 电 话 :0571
www.eeworm.com/read/340857/12130713

mk component.mk

#/****************************************************************************** #* * #* License Agreement
www.eeworm.com/read/17853/762631

smsg vga_system.map.smsg

Warning (10036): Verilog HDL or VHDL warning at freedev_vga.v(158): object "vga_enable" assigned a value but never read Warning (10036): Verilog HDL or VHDL warning at freedev_vga.v(159): object "mem
www.eeworm.com/read/17853/762672

qip vga_sys.qip

set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) D:/FreeDevDAV/example/vga_system/freedev_vga/freedev_vga_hw.tcl] set_global_assignment -name VERILOG_FILE [file join $::quartus(
www.eeworm.com/read/418390/2089571

c menu.c

/************************************************************** 程序说明 :FreeDev输入输出和菜单模块 类 型 :Nios II 说 明 : 测试系统菜单相关函数 *******************************************
www.eeworm.com/read/17853/762387

ptf class.ptf

CLASS freedev_cycloneII_50 { BOARD_DEFAULTS { JTAG_device_index = "1"; REFDES U5 { base = "0x08000000"; } REFDES U59 { base = "0x00060000";