代码搜索：FPGA EDK

找到约 10,000 项符合「FPGA EDK」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/457775/1593287

sav lcd_top_syn.prj.convert.sav

#add_file options add_file -verilog "F:/FPGA大赛/FUSION STARTKIT (G)/实验例程/高级实验/LCD实验/Project/LCD_1602/smartgen/PLL_1M/PLL_1M.v" add_file -verilog "F:/FPGA大赛/FUSION STARTKIT (G)/实验例程/高级实验/LCD实验/Project
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www.eeworm.com/read/190958/5169912

hdlsourcefiles isim.hdlsourcefiles

C:/Xilinx/ISE81/verilog/src/glbl.v C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/verilog/lab6/kcuart_rx.v C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/lab
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www.eeworm.com/read/190958/5170071

hdlsourcefiles isim.hdlsourcefiles

C:/Xilinx/ISE82/verilog/src/glbl.v C:/XUP/Markets/PLDs/Workshops/courses/v82_fpga_flow/xupv2pro/labsolutions/verilog/lab5/kcuart_rx.v C:/XUP/Markets/PLDs/Workshops/courses/v82_fpga_flow/xupv2pro/lab
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www.eeworm.com/read/190958/5170189

hdlsourcefiles isim.hdlsourcefiles

C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/kcuart_rx.vhd C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/uart_rx.vhd C:/X
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www.eeworm.com/read/190958/5170238

hdlsourcefiles isim.hdlsourcefiles

C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab3/time_const/kcuart_rx.vhd C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab3/time_c
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www.eeworm.com/read/330439/3423881

ref hdpdeps.ref

V3 5 FL G:/fpga/20Example/Music_HLD3/lkmusic/top.vhd 2008/06/05.18:05:38 I.24 EN work/musicdec 1212660342 FL G:/fpga/20Example/Music_HLD3/lkmusic/top.vhd \ PB ieee/std_logic_1164 11311
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www.eeworm.com/read/305113/3780507

_info

m255 13 cModel Technology dE:\FPGA\xinkaifabanshiyan\zijizuode\UART\simulation\modelsim\receiver vuart I?5VUZVS22^Q4nC2Ygfn9z2 VAL6N^fD0gW8?XcVf`QkZQ2 dE:\FPGA\xinkaifabanshiyan\zijizuode\S7_UART\phys
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www.eeworm.com/read/305113/3780509

mti uart.cr.mti

E:/FPGA/xinkaifabanshiyan/EP2C35/S7_UART/Src/uart.v {1 {vlog -work work -novopt E:/FPGA/xinkaifabanshiyan/EP2C35/S7_UART/Src/uart.v Model Technology ModelSim SE vlog 6.1f Compiler 2006.05 May 12 2006
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www.eeworm.com/read/367224/2848986

entries

/README/1.1.1.1/Sun Mar 13 21:26:12 2005//Tbranch_R06R2 /fpga.c/1.1.1.1/Sun Mar 13 21:26:12 2005//Tbranch_R06R2 /fpga.h/1.1.1.1/Sun Mar 13 21:26:12 2005//Tbranch_R06R2 D
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www.eeworm.com/read/377687/9264704

fc2 verilog.fc2

#---------------------------------------------------------- # Synopsys FPGA Compiler II simulation script verilog.fc2 # for the book: Digital Signal Processing with FPGAs # Author-EMAIL: Uwe.Meyer
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