isim.hdlsourcefiles

来自「Xilinx的培训教程的源码 virtex」· HDLSOURCEFILES 代码 · 共 11 行

C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/kcuart_rx.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/uart_rx.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/bbfifo_16x8.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/kcuart_tx.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/uart_tx.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/my_dcm.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/UCLOCK.VHD
J:/I.27/rtf/vhdl/src/unisims/unisim_VITAL.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/kcpsm3.vhd
C:/XUP/Markets/PLDs/Workshops/courses/v81_fpga_flow/xupv2pro/labsolutions/vhdl/lab2/uart_clock.vhd