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FPGA 的代码
readme
This directory contains the source code and binaries for the HostMot2
firmware, for Mesa Electronics' Anything-IO cards. (Additional FPGA
firmware and example host-side source code is available from
ex4_4.edf
(edif MUL2_1
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2002 7 25 13 17 57)
(program "FPGA Express"
(version
mul2_1.edf
(edif MUL2_1
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2002 7 25 13 17 57)
(program "FPGA Express"
(version
lab3.edf
(edif lab3
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 1999 7 9 1 52 40)
(program "FPGA Compiler II"
(version
mz4e1ip.h
/*----------------this is FPGA addr------------------*/
ioport unsigned int port1000;
ioport unsigned int port2000;
ioport unsigned int port3000;
ioport unsigned int port4000
tlv_bare_ifc.vhd
-- tlv_bare_ifc: Bare FPGA entity
-- Copyright (C) 2006 Brno University of Technology,
-- Faculty of Information Technology
-- Author(s): Ladislav Capka
fpgacom.txt
0
推荐
FPGA板上实现串口通信
FPGA开发板上写的Verilog代码：
功能是从电脑端发送一个字节，然后把它接收回来。
`timescale 1ns / 10ps
`define Tgate 1
module uart_loop (osc,rst_,rxd,sdo,data_ready,framing_error,parity_error);
inpu
vhdllib.ref
Div_fre5 NULL E:/secret_document/秘密文档/综合/GMSK/用FPGA实现的gmsk的调制程序/div_fre.vhd sub00/vhpl00
Div_fre5 Behavioral E:/secret_document/秘密文档/综合/GMSK/用FPGA实现的gmsk的调制程序/div_fre.vhd sub00/vhpl01
Difr NULL E
hdpdeps.ref
V1 19
AR work/SR3PR_AH/BEHAVIORAL \
FL E:/secret_document/秘密文档/综合/GMSK/用FPGA实现的gmsk的调制程序/sr3pr.vhd \
EN work/SR3PR_AH
FL E:/secret_document/秘密文档/综合/GMSK/用FPGA实现的gmsk的调制程序/gmod.vhd 2004
fpgacom.txt
0
推荐
FPGA板上实现串口通信
FPGA开发板上写的Verilog代码：
功能是从电脑端发送一个字节，然后把它接收回来。
`timescale 1ns / 10ps
`define Tgate 1
module uart_loop (osc,rst_,rxd,sdo,data_ready,framing_error,parity_error);
inpu