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FPGA 的代码
parport.h
/*****************************************************************************/
/*
* parport.h -- FPGA test library exports (and imports).
*
* Copyright (C) 1998, 2000, 2001 Thomas Sai
amemory.v
/////////////////////////////////////////////////////////////////////////////
// FPGA PACMAN memory interface for ALTERA CYCLONE
//
// Version :
//
// Copyright(c) 2002,2003 Tatsuyuki Satoh , All
transcript
# Reading C:/Modeltech_5.7d/tcl/vsim/pref.tcl
# vsim {F:\FPGA\教?
qqq.chn
1 1 1
ATF1508AS
10
1
D:\fpga\cpld\segled\segled.jed
ff.chn
1 1 1
ATF1508AS
10
1
D:\fpga\cpld\lius\kkk.jed
transcript
# Reading C:/Modeltech_5.7d/tcl/vsim/pref.tcl
# vsim {F:\FPGA\教?
runxst_tcl.rsp
set allSynthModules {rom_32x8.MOD lcm.MOD fpga_lcm.MOD}
runxst_tcl.rsp
set allSynthModules {rom_32x8.MOD lcm.MOD fpga_lcm.MOD}
repository
pmon2003/pmon/src/Targets/EV64240/EV64240/fixall_fpga
state2.xrf
vendor_name = Synplicity
source_file = 0, noname, synplify
source_file = 1, c:\eda\synplicity\fpga_81\lib\altera\altera.v, synplify
source_file = 2, c:\eda\synplicity\fpga_81\lib\altera\stratix.v,