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Release 6.2i - Bitgen G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Loading device database for application Bitgen from file "fpga_lcm.ncd". "fpga_lcm" is an NCD, version 2.38, d

module fpga_lcm( DIP2K1, // LCM ........................................... DB0, DB1, DB2, DB3, DB4, DB5, DB6, DB7, E, RS, RW, GCLK0 ); //*************************************

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn fpga_lcm.prj -ifmt mixed -ofn fpga_lcm -ofmt NGC -p xc2s200-5-pq208 -top fpga_lcm -opt_mode Speed -opt_level 1 -iuc NO -lso fpga_lcm.lso

verilog work rom_32x8.v verilog work lcm.v verilog work fpga_lcm.v

Release 6.2i - xst G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.00 / 1.30 s | Elapsed : 0.00 / 1.00 s --> Parameter xsthdpdir set to

-w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:Pu

work

-------------------------------------------------------------------------------- Release 6.2i Trace G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. C:/Xilinx/bin/nt/trce.exe -ints

FPGA component class.

SCHEMATIC START ; // created by map version G.28 on Fri Feb 24 06:52:58 2006 COMP "DIP2K1" LOCATE = SITE "P163" LEVEL 1; COMP "RS" LOCATE = SITE "P166" LEVEL 1; COMP "DB0" LOCATE = SITE "P17