代码搜索结果
找到约 10,000 项符合
FPGA 的代码
arm+fpga.txt
#include "config.h"
#include "math.h"
#define PIN_21 0x200000
#define CLR 0xffffff
#define BEEPCON (1
fpga_load.c
/* 用8031加载ALtera的FPGA，也可用于Xilinx的FPGA的加载 */
void load_epld(void)
{
unsigned char data i;
unsigned int data j;
unsigned char xdata * data pt;
SCON = 0x0; /* 设置8031工作在方式0，
fpga_load.c
/* 用8031加载ALtera的FPGA，也可用于Xilinx的FPGA的加载 */
void load_epld(void)
{
unsigned char data i;
unsigned int data j;
unsigned char xdata * data pt;
SCON = 0x0; /* 设置8031工作在方式0，
fpga_load.c
/* 用8031加载ALtera的FPGA，也可用于Xilinx的FPGA的加载 */
void load_epld(void)
{
unsigned char data i;
unsigned int data j;
unsigned char xdata * data pt;
SCON = 0x0; /* 设置8031工作在方式0，
fpga_counter.edf
(edif FPGA_Counter_PrjFpg
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2006 3 29 23 47 46)
(program "Design Expl
fpga_counter.prjfpgstructure
Record=TopLevelDocument|FileName=Counter.SchDoc
Record=Configuration|Name=EPM7128|DeviceName=EPM7128AELC84-10
fpga_counter.prjfpg
[Design]
Version=1.0
HierarchyMode=0
ChannelRoomNamingStyle=0
OutputPath=
ChannelDesignatorFormatString=$Component_$RoomName
ChannelRoomLevelSeperator=_
OpenOutputs=1
ArchiveProject=0
Timesta