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FPGA 的代码
fpga_flowplus.gfl
# XST flow : Creating project file
top.prj
# xst flow : RunXST
top.prj
__projnav/top.xst
./xst
# XST flow : Creating project file
top.prj
# xst flow : RunXST
top.prj
__projnav/top.xst
./xst
fpga测频.txt
module frequency(RD,WR,ad,lk,hk,CS,A,clk,freq,ALE,aout,int,clear);
input freq,clear,clk,RD,WR,ALE;
input [15:13] A;
input [4:1] hk;
inout [7:0] ad;
output [4:1] lk;
outpu
fpga串行通讯.vbp
Type=Exe
Form=主窗口.frm
Reference=*\G{00020430-0000-0000-C000-000000000046}#2.0#0#C:\WIN98\SYSTEM\STDOLE2.TLB#OLE Automation
Object={648A5603-2C6E-101B-82B6-000000000014}#1.1#0; MSCOMM32.OCX
Object=
fpga串行通讯.vbw
主窗口 = 44, 58, 869, 539, Z, 23, 23, 561, 472, C
fpga1394.acf
--
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any