代码搜索:Digit

找到约 4,689 项符合「Digit」的源代码

代码结果 4,689
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c mont.c

/* tests the montgomery routines */ #include int main(void) { mp_int modulus, R, p, pp; mp_digit mp; long x, y; srand(time(NULL)); mp_init_multi(&modulus, &R, &p, &pp, NUL
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vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
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summary static_digital.map.summary

Analysis & Synthesis Status : Successful - Tue Aug 12 11:19:24 2008 Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version Revision Name : static_digital Top-level Entity Name : static_digit
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vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
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c expevaluation.c

#include #include #include #include #include "stack.c" #include "stackdouble.c" #define Max 100 /* operand's longest digit */ #define TRUE 1 #define FA
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vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
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vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
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vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
www.eeworm.com/read/325597/13195085

vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in
www.eeworm.com/read/138605/13228625

vhd ledscan.vhd

--ledscan.vhd 4 digit bcd-to-7 segment scan display library ieee ; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.components.all; entity ledscan is port( clk : in