代码搜索：Digit
找到约 4,689 项符合「Digit」的源代码
代码结果 4,689
www.eeworm.com/read/404234/2305966
txt not-in-cx2388x-datasheet.txt
=================================================================================
MO_OUTPUT_FORMAT (0x310164)
Previous default from DScaler: 0x1c1f0008
Digit 8: 31-28
28: PREVREMOD = 1
Digit
www.eeworm.com/read/372616/2771345
txt not-in-cx2388x-datasheet.txt
=================================================================================
MO_OUTPUT_FORMAT (0x310164)
Previous default from DScaler: 0x1c1f0008
Digit 8: 31-28
28: PREVREMOD = 1
Digit
www.eeworm.com/read/409339/2234505
java nativejniadder.java
package com.misoo.gx05;
public class NativeJniAdder {
public static int calculate(int digit_1,
int digit_2){
HalfAdder hadder = new HalfAdder();
hadder.set_digits(d
www.eeworm.com/read/287753/8671156
searchresults untitl~1.searchresults
---- M35055_Display_a_char Matches (59 in 5 files) ----
M35055.c (e:\work\m35055 osd):void M35055_Display_a_char(unsigned int Addr,unsigned int A_char);
M35055.c (e:\work\m35055 osd):void M35055_Dis
www.eeworm.com/read/377553/9271601
vhd scan8.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8 is
Port (RES
www.eeworm.com/read/377553/9271630
vhd scan8_line.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8_LINE is
Po
www.eeworm.com/read/365816/9845641
vhd dec_7seg.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
ENTITY dec_7seg IS
PORT(hex_digit : IN STD_LOGIC_VECTOR(3 downto 0);
segment_a
www.eeworm.com/read/364651/9899423
v seven_segdisp.v
//Legal Notice: (C)2005 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic function
www.eeworm.com/read/164942/10081132
vhd scan8.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8 is
Port (RES
www.eeworm.com/read/164942/10081178
vhd scan8_line.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
use work.my_package.all;
entity SCAN8_LINE is
Po