代码搜索：Decode
找到约 10,000 项符合「Decode」的源代码
代码结果 10,000
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c decode.c
#include "../ps2kbd.h"
void PS2KBD_decode(unsigned char sc)
{
static unsigned char is_up=0, shift = 0, mode = 0;
unsigned char i;
if (!is_up) // Last data received
www.eeworm.com/read/430110/1941801
h decode.h
static char base64[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
static int pos(char c)
{
char *p;
for(p = base64; *p; p++)
if(*p == c)
return p - base6
www.eeworm.com/read/429800/1945575
h decode.h
#ifndef UD_DECODE_H
#define UD_DECODE_H
#define MAX_INSN_LENGTH 15
/* register classes */
#define T_NONE 0
#define T_GPR 1
#define T_MMX 2
#define T_CRG 3
#define T_DBG 4
#define T_SEG 5
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c decode.c
/* -----------------------------------------------------------------------------
* decode.c
*
* Copyright (c) 2005, 2006, Vivek Mohan
* All rights reserved. See LICENSE
* -------
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srr decode.srr
#Program: Synplify Pro 8.1
#OS: Windows_NT
$ Start of Compile
#Thu Mar 09 02:05:13 2006
Synplicity Verilog Compiler, version 3.1.0, Build 049R, built May 3 2005
Copyright (C) 1994-2005, Synp
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plg decode.plg
@P: Worst Slack : -0.637
@P: top|CS_ - Estimated Frequency : 235.6 MHz
@P: top|CS_ - Requested Frequency : 277.1 MHz
@P: top|CS_ - Estimated Period : 4.245
@P: top|CS_ - Requested Period : 3.
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srm decode.srm
f "noname"; #file 0
f "noname"; #file 1
f "c:\eda\synplicity\fpga_81\lib\lucent\ec.v"; #file 2
f "c:\prj\example-4-21\asyn_bad\write_reg.v"; #file 3
f "c:\prj\example-4-21\asyn_bad\top.v"; #file 4
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edn decode.edn
(edif top
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2006 3 9 2 5 15)
(author "Synplicity, Inc.")
(program "Synpl
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tlg decode.tlg
Selecting top level module top
@N:"C:\prj\Example-4-21\asyn_bad\decode.v":3:7:3:12|Synthesizing module decode
@W: CL118 :"C:\prj\Example-4-21\asyn_bad\decode.v":17:2:17:3|Latch generated from alwa